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Dual Channel IGBT Gate Driver

Other Parts Discussed in Thread: ISO5452, UCC21520, TMS320F28377S, ISO5851EVM

Hi,

I'm building a three-phase IGBT inverter, and I'm looking at options for the gate drivers. I'm using 1.2kV IGBTs, and this is a flexible prototype so I'd like the drivers to have a high peak current capability.

The ISO5452 looks almost ideal as it has most of the features I'd like (active Miller clamp, overcurrent (desat) fault detection, UVLO, split outputs for control over turn-on/off currents, fault alarm and reset). The only problem is that this is a single-channel device.

The best dual-channel gate driver I can find is the UCC21520. It has a peak 4A/6A source/sink current output, programmable deadtime, and a disable pin. The problem with this device is it's missing the active safety features (and less important for me, the split outputs) of it's single-channel counterpart, the ISO5452.

Just wondering if there's a product or solution to combine the active safety features of the the single-channel device, with the deadtime provided by the dual-channel device? There seem t be plenty of dual-channel drivers for MOSFETs, but I can't find any for IGBTs that incorporate features like Miller clamp and desat detection. Should I just rely on the microcontroller code to never turn both IGBTs on?

Thanks!

  • I also have two additional questions regarding the ISO5452:

    1) The ISO5452 datasheet specifies in sections 10.2.2.1 and 10.2.2.5 that the open-drain "fault" output pins can be wired together to form an "OR". Just wondering if the same applies for the "ready" output pins, as this is not specified. Using 5V for VCC1 and 10k pull-up resistors, if only a single device in a three-phase inverter is driving the "ready" pin low then it will need to sink 3mA (5V / 10k x 6 gate drivers). Is it capable of doing this? What is the maximum number that can be connected together? Is it possible to wire all "fault" and "ready" output pins together to form a single "UVLO/desat" input to the microcontroller?

    2) Regarding the inverting and non-inverting inputs, it seems from the datasheet that it is intended to be used in a single configuration only (either IN- grounded for non-inverting, or IN+ tied to VCC1 for inverting). For a half-bridge leg, is it OK to connect each device's IN+ input to the opposite device's IN- input? This provides some sort of interlock (when either device is on, it forces the opposite device off), even though it's not quite a proper deadtime implementation.

    It would be great if these questions could be answered in addition to the ones asked in my original post. Thanks!
  • Nate, the ISO5452 belongs in the Digital Isolator Forum, so I am going to move your post there; however, I can answer your UCC21520 question.  We do not have a dual driver with the protection features, split control, or clamp.  It is possible to add the DSAT detection and fault generation & reset with external components (comparators + digital isolator).  If you're interested I can send you an example of this.  Otherwise, of course, you can use the single channel drivers with protection.

  • Peter, I would certainly be interested in seeing an example of how to implement desat detection, fault alarm, and reset with components external to the UCC21520. Thanks!

  • Nate, I can email you an example; just send me an email peter_fundaro@ti.com and I'll reply. Thanks!
  • Just sent you the email :) Thanks Peter!

  • Nate Cameron said:

    1) The ISO5452 datasheet specifies in sections 10.2.2.1 and 10.2.2.5 that the open-drain "fault" output pins can be wired together to form an "OR". Just wondering if the same applies for the "ready" output pins, as this is not specified. Using 5V for VCC1 and 10k pull-up resistors, if only a single device in a three-phase inverter is driving the "ready" pin low then it will need to sink 3mA (5V / 10k x 6 gate drivers). Is it capable of doing this? What is the maximum number that can be connected together? Is it possible to wire all "fault" and "ready" output pins together to form a single "UVLO/desat" input to the microcontroller?

    2) Regarding the inverting and non-inverting inputs, it seems from the datasheet that it is intended to be used in a single configuration only (either IN- grounded for non-inverting, or IN+ tied to VCC1 for inverting). For a half-bridge leg, is it OK to connect each device's IN+ input to the opposite device's IN- input? This provides some sort of interlock (when either device is on, it forces the opposite device off), even though it's not quite a proper deadtime implementation.

    Still hoping someone can answer these questions, in addition to a couple more I have:

    3) Is the "fault" pin an output only, or does wiring them together disable them all if a single one goes low? Similar question for the "desat" pin.

    4) Will a 5V supply for VCC1 work with 3.3V input signals? I'll be interfacing directly with a TMS320F28377S microcontroller. The datasheet for the ISO5452 specifies the "min high-level input voltage" as 0.7 x VCC1, so does this mean with a 5V supply the input signal needs to be 3.5V before being read as "high"?

    5) Relating to question 1, could I please get clarification on the pull-up resistors? When I look at Figure 52 in section 10.2.2.5 of the ISO5452 datasheet, is the 10k pull-up resistor connected between VCC and FLT meant to be present on EVERY device, or are the pins connected together with a single 10k pull-up resistor shared for all devices?

    Thanks!

  • Nate,

    To answer your questions.

    1. Yes. RDY pin of all the six gate drivers can be wired together, and a single pull up resistor can be used. You can also wire RDY pin and /FLT pin together if you don't want to differentiate DESAT and UVLO faults. 

    2. You can still connect IN+ of one driver to the IN- of the complementary driver, which can prevent shoot through to some degree. However, there is no dead time setting in the driver. Please refer to Table 1 for function modes of the input logic. 

    3. /FLT is an output pin only. 

    4. Yes. The high logic threshold is 3.5V for 5V supply and 2.31V for 3.3V supply.

    5. A single pull up resistor can be used.

    With Regards,

    Xiong  

  • Thanks Xiong for all those answers!

    Two extra questions:

    • I'm designing my PCB and need to size my traces appropriately, so just wondering what's the maximum current that might flow between the DESAT pin and the IGBT collector terminal? I would have thought it would be relatively small with the 1k series resistor, but looking at the ISO5851EVM user's guide (link here) the tracks in Figure 8 look quite large.
    • Is a bypass capacitor recommended for each VEE2 pin, or is a single capacitor sufficient? Figure 49 in the ISO5452 datasheet (link here) isn't clear on this.

    Thanks again!

  • Nate:

    1. Yes. The current is pretty small with the 1k resistor. However, the loop inductance can be reduced with thick/wide PCB traces. 

    2. It is always better to have a decoupling cap close to each power supply pin. However, it is OK to just have decoupling caps on one VEE2 pin.  

    With Regards,

    Xiong