ISO1541: ISO1541 electrical parameters clarification

Hi,

My name is Idan and I'm electronic engineer.

In my application I need to implement I2C communication with several slaves. For that purpose, I want to use the ISO1541 Bidirectional I2C Isolators but in order to that I need you to answer the following questions that mostly related to the electrical parameters of the latch (side1):

1. In the datasheet you mentioned that when the master releases SDA1, the voltage potential increases and first must pass the upper input threshold of the comparator, V_IHT1. In addition, you also mentioned that V_IHT1 can be between 540mV to 700mV and V_OL1 can be between 650mV to 800mV. As said, it is possible that V_OL1 will be 650mV and V_IHT1will be 700mV. In that case, the side 1 input buffer (Point C, Figure 25) will detect logic Low and the output will be latched. What am I missing?

2. Again, the side 1 input buffer will detect logic high whenever V_IHT1 will be greater than 540mV and logic low whenever V_ILT1 will be less than 660mV. In the worth case scenario, what will the side 1 input buffer detect when the V_OL1 will be 650mV? It seems like the logic high threshold and the logic low threshold areas are overlaps within the 650mV to 660mV….

3. Just to be certain, there is no limitation that VCC2 will be 3.3V and VCC1 will be 5V or the other way around, right?

Thanks a lot,

Idan