ISO7741: SPI Data, the ADC data on the left side cannot be read

Dear Dushmantha,

Thanks for your advice.

I connect the EN1 PIN to the IO port of the MCU for control according to your suggestion.
Before pulling down the ADC1 chip select on the left side of ISO7741, first pull down EN1, pull EN1 high after reading ADC1, and then read ADC2 and ADC3 on the right side of the isolation chip.
The result is the same as before. The result of reading the ADC1 status register is 0xFF, and the reading of Adc2 and Adc3 is normal.

Can you help me? It's urgent.

Thanks a lot.

Elsa Duan

Hi Elsa:

I'm sorry to hear that you're still having issues while reading the ADC1 status registers.

Is it possible to share the schematic and SPI bus waveforms at the MCU while ADC1 status registers are being read? What is the SPI clock frequency in your application?

We can reach out to you via email if you're unable to share the above information in this public forum. Please let us know your preference.

Thanks,

Dushmantha

Dear Dushmantha,

Problem description: The microcontroller can read the data of ADC2 and ADC3 normally, but the collected data of ADC1 is 0 (the ready position of ADC1 is not 0).

The principle block diagram is as follows.

See the picture below for some schematic screenshots.

Two methods have been tried:
1. Solder U18 out. The data of ADC1 can be read normally.
2. Solder the U18, and then short the U18 pad 3 and 14 with wires, 4 and 13 short, 5 and 12 short, 6 and 11 short. The data of ADC1, ADC2, and ADC3 can be read normally.

Thanks

Elsa Duan

Hi Elsa:

Thanks for providing the system block diagram and the schematics.

I don't see any issues with your approach except the U18 EN1 pin should be driven low when ADC1 SPI registers are being read.

I understand that this is something you tried without any success.

Can you please try tying EN1 of U18 to GND to see if you can recover the SPI communication from ADC1? This will eliminate the EN1 to CS1 timing requirements for debug purposes.

To debug this issue further, can you please probe SPI4_SCLK, SPI4_MOSI, SPI4_MISO and CS3 waveforms while ADC1 status registers are being read? It would be useful to probe these SPI signals with (SPI communication not working) and without (SPI communication working) U18.

Thanks,

Dushmantha

Hi Elsa:

Just checking in. Did you manage to make progress with this debug?

Regards,

Dushmantha