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PGA411 two poles resolver

Javier Vara
Expert 1595 points
Other Parts Discussed in Thread: TMS320F28069

Hello,

We are using the PGA411 with a 2 poles resolver and the ABZ interface to the microcontroller. 

There is one register DEV_CONFIG1 that has the NPLE bits. Those bits can be configured for 1x, 2x, 3x and 4x poles. Is that the number of poles of the emulated encoder output or the number of poles of the resolver?

Right now I have it configured as a 1x pole and because of the 2 poles resolver I get two index flags per rev so I would like to have just one, is this possible?

Regards,

  • 0
    TI__Mastermind 23810 points
    Javier,

    Configuring the PGA411 for multiple poles will change the commutation encoder emulation output so that it cycles through all 12 combinations multiple times per revolution. It does not affect any other type of output.

    The PGA411 will not be able to differentiate between a resolver with two poles spinning at 1000rpm and a single pole resolver spinning at 2000rpm. Both will have zero crossings occurring at a rate of 2000rpm.

    What type of application are you working on?

    Thanks,

    -Clancy
  • 0 in reply to Clancy Soehren
    Expert 1595 points

    We are using InstaSpin running in a TMS320F28069 to drive a 200kW motor (with a two poles resolver). It is targeted to automotive applications.

    Does it mean that if I use a 2 poles encoder emulation output I would get 13 bits of resolution per rev? (including two index flags)

    Regards,

  • 0 in reply to Javier Vara
    TI__Mastermind 23810 points

    There are two types of encoder outputs.

    • Quadrature encoder emulation:
      • Uses OUTA, OUTB, and OUTZ
      • NPLE (number of poles) does not affect this output
      • OUTZ will be high only at zero degrees (there will be two index flags per revolution in your system since you are using a two-pole resolver
      • OUTA and OUTB use quadrature encoding to achieve 10 bit or 12 bit resolution depending on the settings
    • Commutation encoder emulation:
      • Uses OUTU, OUTV, OUTW, OUTU1, OUTV1, and OUTW1 (multiplexed to the ORD0-ORD5 pins)
      • with NPLE = 1, there will be 12 possible codes. Each step size will equate to 30 degrees. Changing NPLE will make this faster, so if NPLE = 2, then the step size will be 15 degrees. Note that these numbers assume a single-pole resolver, for the double-pole resolver that you are using, the step size will be halved.

    I hope this clears up your question.

    Thanks,

    -Clancy

  • 0 in reply to Clancy Soehren
    Expert 1595 points

    That cleared up my question.

    Thank you!

    Regards,