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PGA450-Q1: PGA450 datasheet interpretation

Part Number: PGA450-Q1
Other Parts Discussed in Thread: PGA450Q1EVM

Support Path: /Product/Development and troubleshooting/

I'm having an issue with the PGA450 involving SPI communication.

My test setup:

SPI master: STM32F2

SPI phase: 2 edge

SPI polarity: 0

SPI wordsize: 8bit

The PGA450 eval board is connected the STM3 through a level shifter, to go from 3V3 TTL to 5V logic for the PGA450.

I'm trying to program registers within the ESFR. The first thing I do after PGA450 powerup is send a 0x16 0x2F 0x01 to put the onboard mcu into reset to allow for ESFR access. After another transfer, I get the following response to this command: 0x02 0x00 0x00. this would indicate that the command was successful.

Next, I try to read the current value of ESFR address 0xc0, as per the datasheet example. I send: 0x19 0xc0 0x00. Again, after another transfer, the response to this command is 0xc2 0x00 0x00. This would indicate a parity error.

What's going on here? As per datasheet example (Table 17) this is a valid command. Any ideas?