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AM335x MMC cache flush / CMD23 support

Other Parts Discussed in Thread: CSD

I've never spent much time looking into the kernel before, so please let me know if I'm way off base.

I'm working on an AM335x based board with a power supervisor and bulk capacitors such that there is 500+ ms between a power failure interrupt and board reset. Long story short, I'm trying to determine how to force the eMMC to flush its volatile cache within that time. I started by just looking at what happened when `sync` was executed from the Linux command prompt.

The issue I'm seeing is that I never see evidence of the eMMC being told to flush its cache (via the EXT_CSD_FLUSH_CACHE command). Specifically mmc_flush_cache() (in drivers/mmc/core/core.c) is never called if the block device queue hasn't had it's flush flags set. Further, the flush flags aren't set unless the MMC host driver indicates that it supports CMD23.

It seems that the AM335x supports CMD23, assuming that the MMC card does.

So, my question is, why does the omap_hsmmc driver not indicate that it supports the CMD23 capability in it's mmc_host structure?

On the other hand, I'm not exactly sure why CMD23 would be required so support EXT_CSD_FLUSH_CACHE. CMD23 seems to be related to reliable writes and seems that flush cache would specifically not be needed if CMD23 was used.

In general, though, am I just missing something? I have a hard time believing that the MMC volatile cache is never being explicitly flushed by the kernel.

Thanks,

-Chad

  • Hi Chad,

    Can you specify, which SDK is this?

    As far as I can see in the code CMD23 is supported in the latest SDKs.

    Best Regards,
    Yordan
  • Hi Yordan,

    I've been looking at the 4.1 kernel tree, and specifically what the omap_hsmmc host driver reports as capabilities from omap_hsmmc_probe(), see http://lxr.free-electrons.com/source/drivers/mmc/host/omap_hsmmc.c?v=4.1#L2037.

    I'll look into newer sources to see if there are updates, but if you have any pointers, it would be much appreciated.

    Thanks,

    -Chad

  • Hi,

    I suggest you use the official TI SDK releases for your development. The latest kernel ported for AM335x devices is 4.1.18:
    www.ti.com/.../PROCESSOR-SDK-AM335X

    Best Regards,
    Yordan
  • I brought the board up with the SDK Linux (Linux am335x-evm 4.1.18-gbbe8cfc #5 PREEMPT Wed May 11 19:19:10 GMT 2016 armv7l GNU/Linux).

    I added printk's to the following code (drivers/mmc/card/block.c:2183):

    	printk("mmc_host_cmd23: %d\n", mmc_host_cmd23(card->host));
    	printk("is_mmc: %d\n", mmc_card_mmc(card) || mmc_card_sd(card));
    	printk("SD_SCR_CMD23_SUPPORT flag: %d\n", card->scr.cmds & SD_SCR_CMD23_SUPPORT);
    
    	if (mmc_host_cmd23(card->host)) {
    		if (mmc_card_mmc(card) ||
    		    (mmc_card_sd(card) &&
    		     card->scr.cmds & SD_SCR_CMD23_SUPPORT))
    			md->flags |= MMC_BLK_CMD23;
    	}
    
    	printk("maybe call blk_queue_flush: %u, %u, %u, %u\n",
    	       mmc_card_mmc(card), md->flags ,
    	       (unsigned int)(card->ext_csd.rel_sectors),
    	       (unsigned int)(card->ext_csd.rel_param));
    	if (mmc_card_mmc(card) &&
    	    md->flags & MMC_BLK_CMD23 &&
    	    ((card->ext_csd.rel_param & EXT_CSD_WR_REL_PARAM_EN) ||
    	     card->ext_csd.rel_sectors)) {
    		md->flags |= MMC_BLK_REL_WR;
    		blk_queue_flush(md->queue.queue, REQ_FLUSH | REQ_FUA);
    	}

    And then I see the following logs:
    mmc_host_cmd23: 0
    is_mmc: 1
    SD_SCR_CMD23_SUPPORT flag: 0
    maybe call blk_queue_flush: 1, 0, 1, 5

    Which indicates that the host indicates that it doesn't support CMD23, which seems to not enable cache flushing.