I have questions on the TXCLK signal specification for the TLK2711-SP device. Here is the TTL Input Electrical Characteristics for TXCLK signal from page 7 of the data sheet (SGLS307M –JULY 2006–REVISED OCTOBER 2014)
The rise time (tr) and fall time (tf) are defined from 0.7V to 1.9V with input capacitance load of 5 pF. This specification is referenced to Figure 1. However, when you look at Figure 1 on page 9 of the data sheet as shown below, the rise time (tr) and fall time (tf) are defined between 0.8V to 2.0V. The maximum voltage level shown in Figure 1 is 3.6V.
Here are my questions.
1. Why Table 1 and Figure 1 have different rise time and fall time definition? Which one is the correct one?
2. Why 3.6V is shown in Figure 1 when no 3.6V voltage level specification can be found in any tables in the whole document? Any possibility of typo graphical errors in Figure 1?
3. For applications where the TXCLK driver is higher than 2.5V or VDD, where on the data sheet shows the input voltage tolerance and safe level?
4. Can you show the TXCLK input circuit structure with the ESD protection diodes?
5. If TXCLK is driven at a higher voltage through a series resistor before the TXCLK input pin, what is the safe current limit (upper ESD diode turned on from TXCLK source to VDD of the TLK2711)?
6. Does the overdriving of the TXCLK voltage affect the serial data TXP and TXN jitter performance?
Thanks!
David Chien
