TMS570LS31 HDK Development kit - EMIF interface

I asked someone more familiar with EMIF. He noticed that the SN74V293 does not require a synchronous interface as the RCLK and WCLK can be single pulses. So instead of using EMIF_CLK, connect the EMIF_CS signal from the ASYNC protocol to the RCLK and WCLK of the FIFO and use "Select Strobe Mode". Please be aware of the errata concerning use of the EMIF that apply to your device. Specifically errata EMIF#4 and DEVICE#B064. DEVICE#B064 was fixed in silicon revision D, but EMIF#4 was not. Silicon rev C Errata Document. Silicon rev D Errata Document.

Hi,

The FIFO SN74V293 doesn't seem to be having Strobed Asynchronous mode. It needs separate RCLK and WCLK for transfer. Without EMIF_CLK from the development board, is it possible to Read data from FIFO (ADC will supply WCLK to FIFO) ? If asynchronous mode is possible for Read operation, can you share the suitable connection diagram between FIFO and development board?

Also can we simultaneously perform FIFO READ operation (between FIFO and Microcontroller) asynchronously and WRITE operation (between ADC & FIFO) synchronously? Does the FIFO chip support that?

Thanks