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TMS570LS3137-EP: Driving the nTRST pin

Timothy Starr
Expert 2445 points
Part Number: TMS570LS3137-EP

Hello-

I have a question on connection of the nTRST signal.  The evaluation board for the part (see http://www.ti.com/tool/tmds570ls31hdkhas a FET (see schematic page 7, lower right hand corner) that's a bit confusing to me.  The signal ARM_JTAG_TRSTN comes from pin 3 of the 20-pin JTAG connector, and the other signal going to the FET is a PORESET from a power supervisor chip.  Will this implementation work?  It doesn't make sense and there's no info on the datasheet. If there's a better (simpler) method, please  let me know.

Without the source resistor I don't see how it could work. And there must be lots of dependencies before it will engage the reset. Thanks and Best Regards,

-Tim Starr on behalf of OA@CE

  • 0
    TI__Guru 62930 points
    Tim,
    I may need to get with the team that designed this to get the full story.
    However, I suspect the on board XDS100 and emulator header overly complicate the design.
    Will the customer want same setup with onboard XDS100 and use of 20pin arm connector?

    I have seen implementations with wired or open drain logic to combine output from power good or other reset sources. This may be simpler approach.

    I will check with the team that designed the board to see if I can get additional insight on the FET usage.

    Regards,
    Wade
  • 0 in reply to Wade Vonbergen
    TI__Guru 62930 points
    Tim,
    I was able to talk with the team that designed the board.
    The FET is not required, and was used to help manage various requirements from different emulators.

    If only using external emulator, they can simply use pull down on this pin and emulator will properly pull up when jtag active. There is a weak 100uA pull down on the pin already.

    Regards,
    Wade