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CD4013B-MIL: CD4013 Power ON Reset

TI_Electronics
Intellectual 345 points
Part Number: CD4013B-MIL


CD4013 is used as SET RESET latch by grounding D and clock input in my application. However, a CD4013 output is sometimes going high with power ON. How to ensure zero output at power ON?

  • 0
    TI__Guru 62930 points
    I believe the only way to insure this would be to insure RESET is at VDD potential at power up, and SET is low. This still could have brief period of output starting to track VDD, until valid power is achieved.
    The internal state of the flop is undefined at power up with no clock, with exception of the SET low and RESET high case.
    Regards,
    Wade