Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CD4050B: On power down, the output goes high momentarily

Part Number: CD4050B
Other Parts Discussed in Thread: SN74AHC367

When Vdd supply (3.3V) is removed, it has been observed that the outputs momentarily goes high (~1.5V)  for a few milliseconds and back to 0V.

The inputs of the buffer are 3.3V signals coming from an FPGA.

The outputs do not have any pull up/down resistors on them. 

  • The minimum recommended supply voltage is 3 V. Below that, correct operation is not guaranteed. (And CD4000 devices are optimized for high voltages like 20 V.)

    To disable the outputs during power up/down, use a device with /OE like the SN74AHC367.