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SN74LVC2G07: SN74LVC2G07

Part Number: SN74LVC2G07
Other Parts Discussed in Thread: SN74AUP2G125, SN74LVC2G125, SN74AUC2G125

Hi,

      We are using the ADC which supports 3 wire SPI communication and we are using SPI level shifter which will convert the 4 wire SPI communication from FPGA to 3 wire SPI communication for ADC. In that level shifter module we don't know how to change the output pin into HIGH IMPEDANCE STATE. I have attached the image of my schematic below,

  • The open-drain output of the '07 buffer requires a pull-up resistor, so it is not possible to have a high-impedance state with that.

    Use a buffer with three-state outputs, i.e., SN74LVC2G125, SN74AUP2G125, SN74AUC2G125. These devices have overvoltage-tolerant inputs (up to 5 V for LVC, or 3.3 V for AUP/AUC).