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SN74LVC1G240: High-Z of Y when VCC falling (A and /OE low)

Southern Engineering
Intellectual 695 points
Part Number: SN74LVC1G240

Hi,

We have a specific scenario that we would like to ask about with regards to the expected SN74LVC1G240 behavior.

The output (Y) is connected to the gate of an nFET with 1 mega ohm pull-down and 10 uF (actual) capacitance. 
Initial state: VCC = 3V, A high (VCC + 0.5V), /OE connected to A (so high), Y low.

Event #1: A goes low (0V). /OE follows A. Y will try to go high.

Question 1: Will SN74LVC1G240 struggle to charge the 10 uF or potentially be harmed by rush-in current?

Event #2: Event 1 has occured, so A and /OE are low (0V) and Y has managed to go high (VCC). Now VCC is pulled to ground, in practise ending up at ~0.6V.

Question 2: The SN74LVC1G240 will no longer drive the output high, but could we expect Y to go high-Z so that there is no backwards leakage (the only leakage being related to the 1 mega ohm resistor and whatever the capacitor and nFET would bring)?

  • 0
    TI__Mastermind 21000 points

    Hi Mr. Engineer,

    1. We spec switching characteristics up to 50pF for this device. 10uF is at risk for exceeding the current maximums of the device. At the minimum you need to add a damping resistor to reduce the current.
    2. Y should be high-Z here.

    Best,

    Malcolm