Hello,
We are using SN74LV123A IC in our design. we are expecting the outputs as truth table highlighted per attached image.
Our circuit is as below attached image.
Input B is as shown in the attached image below. with other inputs given as follows. #A = Always LOW, #CLR=Always HIGH.
The output Q is always HIGH and Q# is always LOW. I don't see any change in the outputs. we are expecting pulses of duration 100ns during the rising edge of the input B.
Could you please check and let me know what might be the reason for this? any issues in the design?
Thanks and Regards,
Santhosh