SN74HCS594: Difference to SN74HCS595

The '595 has an /OE input do disable the outputs. The '594 instead has an /RCLR output to reset the output registers to zero.

So 595 make them High-Z, while 594 sets to be Low?

How many GPIO pins are required at a minimum to control the output? I am using these devices to generate additional GPIO outputs. I will be using two in series to create a 16-bit output.

Can it not be possible to combine (SRCLK and RCLK), Set OE to Low, and then SRCLR to another GPIO,  so we have one clock line, one SRCLR and the on data, total of 3 GPIO?

This way, as I set the bit, they are also being outputted on the falling edge on the clock. Is there a way to also do this? And every time I need to make a change to GPIO, I simply do a CLR and reset, also previous PINs to previous level and do 16 clock cycles.

This is my circuit diagram at the moment, please note the symbol is for 594, but I will be using 595

Is it possible to use a pin on only the final IC as an additional GPIO pin?

Also, how can I confirm that I the data I am inputting into the device is starting with output A, do I always need make sure I have 16 CLKS, and would the SRCLR reset the counter to 0? This is to ensure there is not out-of-sync between data input and output or any form of mismatch. 

With SRCLK and RCLK connected together, the bits will be shifted through the output pins and are visible there. Is it OK that the outputs have wrong values for a short time? (This would be tolerable only for LEDs.) In general, you should control SRCLK and RCLK separately. (You do not need a GPIO for SRCLR if you simply shift in 16 bits.)

No, we would not want that, as we are controlling the SSR to avoid any small fluctuations.

If we do not use SRCLR, how would we reset the registers?
For example, if my device resets at the point where it is setting the register, how can we ensure that it will start again from bit 0?

So, it looks like we would need 4 GPIO pins from the microcontroller?

What happens if we need to perform a reset to ensure that the 16-bit number is correctly in sync? For example, if the user presses the RST button on the microcontroller after 7 clock cycles, and the process of setting the register starts again, would it continue from cycle 7? What happens if we want it to start from cycle 1 instead?

 Clemens Ladisch 

So as the reset process, I can set the data to be 0, preform 16 clocks, after the output to any value

Yes; this will clear the shift register. (You must pulse RCLK to also clear the output pins.)

RCLK is only one clock, I believe?

Is SR CLR required then? Can this be set to just high?

So we could set SRCLR to be high, and set data to to Low, to set all outputs to 0

Thanks.

Option 2 would be better — one less GPIO.

The datasheet shows pin 10 (SRCLR) with an RC circuit. Is this necessary? Can this pin be connected directly to 3.3V? And can pin 13 be connected to GND?

I will be using two of these devices, giving me 16 signals. However, there is a possibility I might need 17. Instead of adding another device, could I use QH' (pin 9) on the last device, invert it using a 2N3904 transistor, and use that as my 17th signal? Is that feasible?

Maybe not a good idea, as it seems QH' is not dependent on RCLK if I am correct.

So I guess I can add an additional device then

This is my final design. Do you see any changes that should be made?

/RCLR must be connected to VCC; otherwise, the outputs will always be zero.

 Clemens Ladisch 

I am planning to use SN74HCS595, instead of SN74HCS594, but I believe the device is compatible; it's just my PCB symbol is SN74HCS594

So Pin 13, which is currently LOW, is going to be the OE, which, if I am correct, needs to be low for any output?

Correct.

Great, so i am good to go.

It just that for some reason my PCB library does not have SN74HCS595, so have just kept SN74HCS594