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What is the minumum frequency for operation on the 74ls73N

victor morita
Prodigy 140 points

Hi:

My problem is that I was told that the sn7473n is compatable with the sn74ls73n.  The specification says 0-30mhz operational clock input.  I was told that you guys are phasing out the SN7473N. My problem is that your sn74ls73n doesn't go below 5 hz.  During testing the group of 4 jk flip flops die around 5hz. Yet your sn7473n goes down to 1hz.

I first thought it could be amplitude level so I increased the clock amplitude level to no avail why?

Regards,

Victor Morita

  • 0
    TI__Mastermind 46480 points

    Hi Victor

    The should be no minimum clock frequency. More than likely as you slow dow your frequency your edge rate also is slowing down wich is causing the problem. The recomended edge rate for LS is 15ns/V or faster.

  • 0 in reply to Chris Cockrill
    Prodigy 140 points

    Hi Chris:

     After looking at the rise and fall time of the clock it is 25nsec (5 volts times 15nsec is 75nsec).  The answer didn't resolve the issue. I have fixed the problem, I will share my findings. On the old sn7473N you could leave unterminated inputs open and they would work for a 20 year old design. The SN74ls73AN needs to have the unterminated inputs tied to power or ground. In my case it was the 1Clr and 2 Clr inputs not tied to VCC that cause them not to divide. When I monitored the inputs with a scope probe it showed with a high clock rate the dc level was high, when the clock rate was ( below 5 hz) it drifted down prevented  an output. ( pins #2,#6).

    Regards,

    Victor Morita

  • 0 in reply to victor morita
    TI__Mastermind 46480 points

    Hi Victor

     Thanks for the update. Open inputs will usually cause problems.  Sometime on TTL parts the inputs will float low and allow them to work if they are not tied.    For Cmos and Bicmos they will rarely work if the float.