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Bidirectional Logic Level Converter

Alwyn Smith
Prodigy 10 points

I've reviewed the data sheet for SN74GTL2010, 10-bit bi-directional logic level converter, and while the data sheet says that the ON resistance is very low, it says nothing explicit about the impedance when Sref and/or Dref pins are unpowered or tied to ground.

Are the inputs and outputs in a high-impedance state when the Sref or Dref are at 0V / GND?

  • 0
    TI__Guru* 96842 points

    Alwyn,

    This part is a very simple passive FET switch-based translator.  The Sref/Dref pins are tied to a FET and basically setup the switching threshold for all of the other FETs.  Grounding Gref will turn off all of the FETs -- ie put them into a high impedance state.  Grounding Sref will increase the current through the reference FET and will change the threshold voltage for the other gates, and grounding Dref will reverse the current through the reference FET and change the threshold on the other FETs.  Grounding all 3 will put all other FETs into a high impedance state (ie Vgs for the other FETs will always be < 0).