TXS0108 - Does it support the RMII Interface?

Frank,

Thank you for your request on our level shifter product. I'm going to move your questions to the level shifting forum to help get you an answer from our level shifting engineers.

Thank you,
Adam

Frank,

Please let me know the voltage levels that they are trying to translate. Reading the RMII specification, I would assume that it is between 3.3V and 5.0V. Can you confirm?

I am hesistant to recommend any of the TXS or TXB level translators for a RMII application. The DC characteristics table from the RMII speficiation is shown below:

This table indicates that an input pin could potentially draw up to 200 uA worth of current when receiving a Logic High signal. Unfortunately, the TXS and TXB solution of level translators can only provide up to 20 uA of current when driving a Logic High (or Logic Low too). This is documented in the VOH Test Conditions:

Any current draw excedding 20 uA would result in a reduced VOH from the TXS or TXB outputs.

The AVC or LVC family of level translators can provide several mA of current and could be a beter choice. I will get back to you to see if I can provide an alternate recommedation. Thanks.

Best Regards,
Nirav

Frank,

It appears that the RMII specification consists of 8 pins. Furthermore, these 8 pins can be grouped into two groups of 4:

1. 4 pins that transmit from the PHY to the MAC [CRS_DV, RX_ER, RXD0, and RXD1]

2. 4 pins that transmit data from the MAC to the PHY  [REF_CLK, TX_EN, TXD0, and TXD1]

An ideal solution would be an 8-bit translator with 2 direction control pins to control each set of 4 pins. Unfortunately the translators that I support do not have such a product.

The best that I could offer is 2x SN74AVC4T245, if the translating voltage does not exceed 3.6V.

The AVC channel-to-channel skew expectations are in this E2E post:

I've notified of another applications engineer that supports another family of level translators to see if there is a product in their portfolio that they would recommend. Thanks.

Best Regards,
Nirav

Hi Nirav,

Thank you for your help. The VCCA is 1.8V, VCCB is 3.3v. Our concern is the time delay of the chip.

For 50Mhz, the T=20ns, the delay time maybe too large here. Do you have some comments about this? And we also want to check the delay time difference of different channels. Thank you.

BR

Frank

Hi Frank,

The skew is not spec'ed on the datasheet and not production tested either . The general assurance is the channel skew on the logic devices is <1nS and typically ~300ps . The device to device skew depends on the process and fab lot .
The tpd and freq support doesnt correlate . You cannot estimate the freq support of the chip from the prop delay . for eg. The device might be able to support 250Mhz but can have prop delay of 20ns too.
Please check for the requirements here below :
www.ti.com/.../application-specific-voltage-translation-products.page
I see there are 2 DIR pins for 16 bit part , but most likely not for a 8 bit part.

Hi ShreyasRao,

I want to check the delay below for different channels?

BR

Frank

Hi ShreyasRao,

Can we use the TXS0108 here? Could you please help me explain the tPLH? Thank you.

BR
Frank

Frank,

Pleasre re-read my initial post about why TXS probably can't work.

Best Regards,
Nirav

Hi Nirav,

Does the time delay not influence the performance? Thank you.

From(SN74AVC4T245 datasheet)

3.9ns/20ns=25%(for 50M)

BR

Frank

Hi Nirav,

Thank you.

BR
Frank