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SN74AVCH16T245: SN74AVCH16T245

Part Number: SN74AVCH16T245

Hi,

We are using SN74AVCH16T245 for the bidirectional translation between 1.2V signals (A side) and 2.5V signals (B side).  A pull up resistor of 10Kohm has been used to tie OE to VCCA, which is 1.2V, with a control enabling a zero voltage while using the transmission function. Also, a pull down resistor of 10Kohm has been used to tie DIR to GND. B side is fed in the signals from a FPGA with a voltage level of 2.5V, which is the same as VCCB. VCCA (1.2V) and VCCB (2.5V) are powered on simultaneously. However, we can not get the chip to work properly in translating the signals from one side to another. It works after powering up and staying in tristate mode. When the OE was tied directly to GND by the control signal, while FPGA holding the signals to either high or low, it consumes more than 4mA and VCCA dropped to approximately 0.4V. How can I correctly configure the chip and get it wot work? Is it possible to directly tie the OE and DIR to either VCCA or GND for the bidirectional signal translation between 1.2V (VCCA) and 2.5V (VCCB)?

Thank you.

  • Hello Xing,

    I think I understand how it is connected, but can you please provide a schematic for clarity and ease of understanding.
    It seems that either the VCCA is getting shorted to ground somehow, which is causing the supply to drop from 1.2V to 0.4V, or possibly your outputs are trying to draw more current than the device can provide.
    For a 1.2V VCCA, the maximum output high level current is 3mA, so if the load is trying to pull more than that, it may be causing a problem.

    Hopefully this helps in your investigation, and if you could provide more details then that would help me make additional suggestions.

    Best,
    Michael
  • Hi Michael,

    Thank you for your reply. The schematic of the chip configuration is attached. The signals with 'F' as the last character are the ones connected to FPGA side (VCCB = 2.5V), while the others without 'F' as the last character are connected to a customised chip (VCCA = 1.2V). During the test, all the signals on the B side were connected directly to the FPGA without any pull up/down resistor as indicated in the spec. sheet. And all the outputs on A side were floating, as we would like to figure out the correct configuration of the level shifter before hooking up the customised chip which has a limited inventory. The current compliance of the power suppliers were set as 4mA both sides.

    Thank you.

    Xing

  • Hello Xing,

    Its possible that on startup the outputs are trying to all consume current to define their output states since they are floating (the bus hold outputs will help to define the output states).

    However, the peak current required to define all outputs may be more than 4mA instantaneously. Once the power supply is pulled as low as 0.4V, the device will never be able to get into a steady state.

    If you increase your power supply compliance to 30mA, does it work? It may have a large peak current, but should settle to a low current consumption once all the outputs are defined. This would be switching current, and not active current, so the device may require an initial peak of current, but should settle to a low current once the device is static.

    Let me know if increasing the current from the power supply helps, and if so, does the current settle down after the device is turned on?

    Best,
    Michael

  • Hi Michael,

    We tried the 30mA compliance, it did not work in the test. The test we have done today is concluded as following for further analysis.

    VCCA and VCCB were both supplied by 2.5V with 30mA compliance.

    1) When OE was high (pulled up by a 10Kohm resistor to VCCA), the inputs were disconnected. The chip should be in tristate mode, which having all the inputs and outputs with high impedance. All inputs should be either high or low biased by the bus holder circuit inside the level shifter. However, a current fluctuation has been observed, i.e. sometimes VCCB consumes 1mA, and sometimes 7mA or other value. Also, one of the input sometimes was changing its status between high and low unsteadily, and sometimes in middle rail such as 1.2V. The current fluctuating corresponds to the unsteady input status changing.

    2) When OE was low (connected to GND) with all inputs floating, the outputs' supply VCCA hit the current compliance of 30mA, and VCCA dropped to 1V.

    3) When OE was low (connected to GND) with all inputs tied directly to GND, both VCCA and VCCB hit the current compliance of 30mA. VCCA and VCCB dropped to 1V and 0.5V, respectively.

    Looking forward to your reply.

    Thank you.

    Xing

  • Hello Xing,

    1) If one of the inputs is showing that it is not going to the level that the FPGA is driving, then it sounds like the error might have to do with this pin.
    The inputs to this device must be GND or VCC and transition quickly between these two states in order to prevent a large amount of current shootthrough from VCC to GND.

    2)If the input from 1) is not in a defined state, then its possible the device could consume a fair amount of current on the output.

    3) If you are grounding all the inputs on the B side, and the VCCB is getting pulled down, it sounds like there may be a short somewhere in the system. I would check the hardware to see if there is an unwanted connection, because this should not be happening.

    I am also wondering if the device is populated on the board correctly, because I can see these issues happening if the device is populated 180degrees.

    You need to make sure that all inputs are in a defined state and that outputs are not connected to anything that will drive them. Additionally, you might want to try putting a 10k or 100k on each of the outputs to ground to see if that fixes the problem. If it doesn't then I suspect there is a short in the system or the part was previously damaged unknowingly.

    Best,
    Michael