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74AC11074: about low jitter trigger

Part Number: 74AC11074
Other Parts Discussed in Thread: SN74AUC2G79

hi dear supporting team,

in the D-trigger family, which one has the lowest additional jitter? customer want to get one as  200MHz clk buffer.tks!

  • Hi Vera,

    The AUC family of logic is our fastest series of devices in terms of propagation delay.  The SN74AUC2G79, for example, has propagation delay of 0.3 to 1.2 ns at 2.5V operation.

    I'm afraid we don't specify jitter for these devices -- selecting the lowest possible propagation delay will mitigate jitter, however I cannot quantify it without test data (which we don't have).

    One of our most experienced engineers posted this in response to a jitter question on the forums:

    "Jitter on LVC logic will be less than 20ps. I beleive if you stack 7 counters the jitter will still be less than 20ps." --Chris Cockrill

    The LVC family was not designed specifically for speed, but performs very well.  The AUC family was specifically designed for speed, and thus I would expect even better jitter performance from AUC than LVC.

    Unfortunately, none of our LVC devices will hit the 200MHz requirement you have.

    I pulled a list of D-Type Flip-Flops that have a max frequency of at least 200MHz here.

  • hi Emrys,

    thank you for the reply!

    so is it possible to get the noise floor of SN74AUC2G79 at 100Hz, 1KHz,10KHz, 100KHz offset for 200M frequency point? tks a lot!(either by simulation or testing)

  • I'm not sure exactly what you're after.

    The inputs of the device are immune to noise of up to ~1V (depending on Vcc, check VIH/VIL specs for details).

    Are you looking at how much cross-talk the outputs will have? That's something we typically don't spec on logic devices.

  • hi Emrys,
    I am asking for the noie floor spec of this chip, like amplifier kinds of product, should there be spec on noise floor? tks a lot!
  • No, logic devices do not spec a 'noise floor' because they don't pass linear signals.