Hi team,
My customer is evaluating our SN74LVC16T245. Some abnormal output glitch was found during power up, the schematic as below:
X_DATAx, X_DATA_Ox and X_DATA_DIR are controlled by CPU' GPIO. And CPU will output these GPIO signals 200ms after it's supply is setup and stable.
VCC supply(B side) will be set up before VCC33(A side). During this stage the output side(A side) will output abnormal pulse showed as below(Pls note that at this situation, the input side(B side) was kept low):
Customer want to know the root cause of this glitch, can you pls help explain this abnormal pulse asap before customer fixed the design? Thanks a lot.
Best regards,
Sulyn Zhang