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input transition rate SN74AUP3G17 vs. SN74AUP1G17

Other Parts Discussed in Thread: SN74AUP3G14, SN74AUP3G17, SN74AUP1G14, SN74AUP2G14, SN74AUP1G17, SN74AUP2G17, SN74AUP3G34

Hello,

according to the datasheets of the SN74AUP3G17 (triple buffer) and SN74AUP3G14 (triple inverter) a max. input transition rise/fall rate of 200ns/V is recommended, although these devices feature Schmitt trigger inputs. For the single gate (SN74AUP1G17 / SN74AUP1G14) and dual gate versions (SN74AUP2G17 / SN74AUP2G14) there is no such requirement.

Question: Is this just a copy&paste error for the triple buffer/inverter from the datasheets of the non-Schmitt trigger versions SN74AUP3G34 / SN74AUP3G14? Or can there occur such an excessive cross current when all 3 inputs are within the transition region, that the device could be damaged?