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SN74AHC1G09: Output load capacitance

Mike Greenwood
Prodigy 50 points
Part Number: SN74AHC1G09

We have an existing design that  has been used for 20 years and is being updated with parts that are specified from the vendor to operate from -55 °C to +125 °C.  We would like to replace the parts with the exact same footprint if possible.  If not the same footprint, then something smaller.  And as a last resort something larger. 

The SN74AHC1G09 is an open-drain output.  I am thinking of replacing a 74LS09D (which is an open-collector output, SOIC, 0 °C to +70 °C) with the SN74AHC1G09.  One of the key parameters that I need to know is the output capacitance, Coss, of the FET.  Currently we have the output of the gate pulled up with a 1k ohm resistor and it operates at a minimum high pulse width of 35 ns.  The rise-time needs to be as fast as possible and as such the output capacitance of the open-drain FET will affect the rise-time.  I've simulated my circuit with a FET from Infineon, BSS123N, which appears to be an acceptable type of FET.  The BSS123N has a typical output capacitance of 3.4 pF so I would be looking for something around this value, obviously the smaller the better.

If I feel that the SN74AHC1G09 will not work acceptably in our existing design I may have to use the SN54LS09FK (20 pin LCCC) which is phyically larger than the I would like.

Thanks for your help.

  • 0
    TI__Guru* 96782 points
    Hi Mike,
    Thanks for reaching out to us.

    I will be happy to check the output of this device.

    I assume you are operating at 5V (considering the device you're replacing). Would it be acceptable for me to just get scope shots with a 1k pull-up and a known load (I'll have to measure the trace/probe capacitance in the lab, but I would venture a guess at 15pF load) so you can see the edge rates directly?

    It will take me some time because I'm swamped, but I can definitely test this out for you.
  • 0 in reply to Emrys Maier
    Prodigy 50 points

    Having an actual response would be nice to see as a typical response, but as you mentioned, you would have to factor out the trace/probe capacitance.  It would also be nice if the datasheet had the output load capacitance as a specified parameter.  Eventually, I'm going to need to do a worst-case analysis and it works a lot easier to have the parameters that are of interest (and output load capacitance is one of them) specified on the datasheet. 

    The datasheet shows the propagation delay (tpd = tplz) for a high signal input to output, but only as the output transitions out of the low state (Vol + 0.3V).  Personally, as a Design Engineer, I think the output load capacitance is a critical parameter and should be specified on the datasheet.  I've played around with estimating the output load capacitance given the propagation delay difference between the test loads of 15 pF and 50 pF, but this is only a crude estimate and I can come up with output load capacitance values from 2 pF to 38 pF.

  • 0 in reply to Mike Greenwood
    TI__Guru* 96782 points
    Hey Mike,
    It would certainly be helpful to me as well if TI had specified this type of thing when the parts were created (20+ years ago). Unfortunately, it's unrealistic to think that we can recharacterize all 21,000+ devices that we make (just in the logic devices area) to include output capacitance -- just updating the 1,800+ datasheets would take another 20 years to complete with our current resources.

    We will definitely get in the lab and get you some data to work with.
  • 0 in reply to Emrys Maier
    Prodigy 50 points

    Emrys,

    Understood.   Wasn't sure what particular resources you had or didn't have.  Maybe it was more of a general statement for open-drain outputs, that the output load capacitance would be useful to know, and if the part was to have an update of some sort it might be considered to be added.  Thanks again, however, for working on getting me the lab results.

  • 0 in reply to Mike Greenwood
    TI__Guru* 96782 points
    No problem - I do whatever I can to help. I'm out of the office this afternoon, but one of my associates should be testing the device today and I'll try to have the data to you when I get into the office in the morning.
  • 0 in reply to Emrys Maier
    TI__Guru* 96782 points

    Hey Mike,

    Sorry it took me a bit longer to get data for you -- my first shipment of samples was the wrong part (first time I've ever seen that happen...).

    I pulled a couple of scope shots at 13.7pF load (8pF probe + 5.7pF from the board/setup):

    Figure 1 - 5V operation, 25C, 1.1kohm pull-up, 15.7pF load

    Figure 2 - 3.3V operation, 25C, 1.1kohm pull-up, 15.7pF load

    What's fascinating to me is, when I used the rise-time to back-calculate the capacitance (using 63.2%*Vcc = R*C), I calculated that the equivalent capacitive load was 7.5pF... which is less than half of the actual load.  I know that's impossible, but I assume it's because of the reflections (all the bumps) causing problems for me.

    It's pretty safe to say, however, that the device has no problems with operating at a 35ns pulse width.