SN74LV4T125: SN74LVC3G34: actual propagation delay time

Yuzuru Tanabe1

Part Number: SN74LV4T125
Other Parts Discussed in Thread: SN74LVC3G34

We use the following TI logic IC for driver on the board,
And we need to check the minimum and maximum signal propagation delay times for each.

SN74LV4T125RGYR
SN74LVC3G34DCUR

=. Request content
Could you tell me the actual minimum and maximum delay time even if I can not guarantee?

our Appication's condition are following;

Vdd : 4.3V

Temp: 20 deg-C to 55 deg-C

Or could you give us these samples of the strong process and weak process?
Or, could you give us sample lots different?

If you can support these samples, we will evalute the delay time on our appication board.

And in the our decision, we will decide how to use them in our board.

=. Our usage and background

Our circuit use above two ICs with sequentially connected to propagate the signal.
The power supply voltage is used at 4.3V.
In IC Data-Sheet, there are the delay time specifications at only 3.3V or 5.0V.

Therefore, we need to use the delay time as the following

the Min delay time <--- Min value of 5.0 V

the max delay time <--- Max value of 3.3 V

Furthermore, the SN74LV4T125's data-sheet has no min delay time specs. so, we use 0ns delay time.
The delay time of the signal passing through the two ICs is 1 ns minimum and 10.1 ns maximum.

As uyou know , this long variation priod is not usefull for us.

Thank you very much for you cooparetions,

Y.Tanabe

over 5 years ago

0 ShreyasRao over 5 years ago

TI__Guru 57870 points

Yuzuru san,

We cannot arrange for the different lot or different process devices.
During the characterization, we get the nominal silicon and not across process. The design simulation can predict the strong/ weak corner estimates.

From the datasheet of the SN74LVC3G34, I can say that the min <> max tpd for 4.3V case is probably going to be :
1.2ns to 3.5ns.
Similarly, I would expect the max of SN74LV4T125 to be 4ns.

0 Yuzuru Tanabe1 over 5 years ago in reply to ShreyasRao

Prodigy 30 points

Thsnk you for your reply.

Could you inform me how to estimate the delay time : 1.2ns to 3.5 with following SN74LVC3G34's Scpes?

SN74LVC3G34's DataSheet
tpd @ –40°C to 85°C
VCC = 3.3 V ± 0.3 V Min 1.4 ns Maxc 4.1 ns
VCC = 5 V ± 0.5 V Min 1.1 ns Max 3.2 ns

And SN74LV4T125's case, these is no min specs in the DataSheet.
How to estimate min/max delay time?

tpd @ –40°C to 125°C ns
VCC = 3.3 V ± 0.3 V Min 1.4 ns Max 5.1 ns
VCC = 5 V ± 0.5 V Min 1.1 ns Max 3.8 ns

0 ShreyasRao over 5 years ago in reply to Yuzuru Tanabe1

TI__Guru 57870 points

Yuzuru,

These values are only estimates and is not guaranteed and you had mentioned in the original post that these values need not be guaraneed,
I estimated the delay time from the datasheet specs given for 3.3 and 5V. The target Vcc is 4.3V which is closer to the Vcc 5V+/-0.5V variation.
Hence, i have predicted that the values will be closer to the Vcc 5V value.
min value for the LV4T125 estimated to be 1.1ns.

0 Yuzuru Tanabe1 over 5 years ago in reply to ShreyasRao

Prodigy 30 points

Excuse me, I miss the Max delay value of SN74LV4T125.
I had made the summary for your reply.
At 4.3V without guarantee.

SN74LVC3G34's delay : Min 1.2ns Max 3.5 ns
SN74LV4T125's delay : Min 1.1ns Max ??ns

And thses values are estimated from 5.0V specs due to 4.3V is near the 5.0V-0.5V.

This is my understanding, Is this correct?

0 ShreyasRao over 5 years ago in reply to Yuzuru Tanabe1

TI__Guru 57870 points

Yuzuru,

Max for the SN74LV4T125 is approximated to be 4ns. and yes, the approx is based for the 4.3Vcc and is closer to the 5V spec.

Logic

Logic forum

SN74LV4T125: SN74LVC3G34: actual propagation delay time