SN74LS247: Is sn74ls247 compatible with 3.3V logic?

Xiang Maverick

Part Number: SN74LS247

I use FPGA to connnect directly with sn74ls247 BCD inputs. FPGA IO is 3.3V level, whereas sn74ls247 is 5V level. Is this a bad design?

0 Clemens Ladisch over 4 years ago

Guru 285430 points

LS family devices have TTL-compatible inputs, i.e., the worst-case V_IH is 2 V.

You can connect a 3.3 V CMOS output to an LS input, as long as the output is able to sink I_IL.

0 Xiang Maverick over 4 years ago in reply to Clemens Ladisch

Thank you. What is the meaning of "the output is able to sink IIL"

0 Clemens Ladisch over 4 years ago in reply to Xiang Maverick

Guru 285430 points

Your FPGA's datasheet should tell you the drive strength of its outputs.

0 ShreyasRao over 4 years ago in reply to Clemens Ladisch

The LS247 IIL max is 4mA as per the datasheet. The FPGA IOH/IOL must be at least 4mA or greater in the worst case to have the inputs switch.

0 Clemens Ladisch over 4 years ago in reply to ShreyasRao

Guru 285430 points

4 mA is for the TTL device (SN74247). The LS device (SN74LS247) has 1.2 mA.

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