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unintended driven output on SN74LVC8T245 bus tranceiver during power-up

M E
Prodigy 40 points
Other Parts Discussed in Thread: SN74LVC8T245

I'm using a SN74LVC8T245 in an embedded application and am seeing a 0.8ms output pulse when the input is low and the input power is ramping from 0-3.3V.  The output rail is 5V and is up approximately 2.2ms prior to this event.  The 3.3V bus is around 0.8V-1.2V when this occurs and it is ramping at a rate of 0.5V/ms.

My intent is to have this output be high impedance until both rails have powered up and the DSP chips driving them have gone through configuration steps. 

Unfortunately, this high output occurs even when the output enable (!OE) is pulled up to 3.3V by the input voltage on either side.  I originally had the Output Enable connected via pull-up resistor to the 3.3V rail when I first encountered this issue.  Suspecting it needed a firmer voltage, I connected it via a 3.3V/5V (10k and 20k) voltage divider to the 5V supply.  It still occurs in exactly the same manner on all channels.

I'm confused because this output should not be occurring per the notation in the datasheet at http://focus.ti.com/lit/ds/symlink/sn74lvc8t245.pdf page 2:

"To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver."

Has anyone else encountered this discrepancy or is the chip suspect?

Thanks.

  • 0
    TI__Genius 9085 points

    Since the glitch happens around the Vt threshold of some of the internal transistors, I suspect it's the result of your slow ramp rate. I will look into this more.

    You can tie the /OE pin directly to 5V. It's 5V tolerant. Referenced to VccA is only with respect to logic thresholds, eg. the minimum voltage for a logic high.

     

  • 0
    TI__Genius 9085 points

    Hi M_E,

    What voltage does the output glitch reach? Do you have a waveform you could share to help us track down the cause?

     

    Thanks!

  • 0 in reply to Hattie
    Prodigy 40 points

    The output goes to 5V, the b-side VCC and promptly returns to zero when the high-impedance state returns.  The edge is sharp, though I have seen some conditions where two output pulses are seen, one when the 5V comes up and then the more prominent one when the 3.3V on the a-side is rising.  In these cases, the first pulse is limited to the 5V input voltage, so it carries the same characteristic (rising) as the rail voltage.

    I do have traces, but I'll have to check with the project manager about IP issues before I can post them.

    Thanks.

  • 0 in reply to M E
    TI__Mastermind 46480 points

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