1.8V LVCMOS to 3.3LVCMOS with the lowest possible delays ( <500psec)

Dilip Namdeo Mohol

Intellectual 1420 points

Other Parts Discussed in Thread: LSF0101

Hi,

I am looking for from1.8V LVCMOS to 3.3LVCMOS with the lowest possible delays ( <500psec) Please suggest .

Dilip

over 3 years ago

0 Clemens Ladisch over 3 years ago

Guru 243110 points

The fastest translators are in the AXC family. For 1.8 V → 3.3 V, their propagation delay is somewhere between 0.5 ns and 4 ns.

For which application do you need such a small delay?

0 Piyush Jaju over 3 years ago in reply to Clemens Ladisch

Prodigy 10 points

Hi Clemens,

It is for PTP clock conversion application.

Thanks,

Piyush

0 Clemens Ladisch over 3 years ago in reply to Piyush Jaju

Guru 243110 points

A passive switch like the LSF0101 can have very low propagation delays if the pull-up resistor has a sufficiently low value (and if the capacitive load is not too high). With R_L = 300 Ω, typical delay is 0.4 ns, but the signal source must be able to sink 11 mA.

Logic

Logic forum

1.8V LVCMOS to 3.3LVCMOS with the lowest possible delays ( <500psec)