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AM2732: DSP core DSS_L3 size

Part Number: AM2732

hello expert,

  mmwave_mcuplus_sdk_04_02_00_03 is the sdk version we are using to build the demo,and in our app need to use lwip tcp to transfer radar adc data to pc.

  In the document AM273x Technical Reference Manual(spruiu0), memory map chapter

  2.1 Master Subsystem Cortex R5F Memory Map:   DSS_L3 0x88000000 3.5625 MBytes  (page 16)

  2.2 DSP Subsystem C66x Memory Map:                DSS_L3 0x88000000 2 MBytes     (page 21)

  2.3 Radar Control Subsystem Memory Map:        DSS_L3 0x88000000 3.5625 MBytes  (page 25 )

Why is DSP CORE DSS_L3 different from the other two?Is it a typo in the documentation?

We use the  the c66x_linker_enet.cmd as link file。  c66x_linker_enet.cmd (ti\mmwave_mcuplus_sdk_04_02_00_03\mmwave_mcuplus_sdk_04_02_00_03\ti\platform\am273x\)

MEMORY
{
DSS_L2: ORIGIN = 0x800000, LENGTH = 0x60000
DSS_L3_RSV: ORIGIN = 0x88000000, LENGTH = 0x00008000 /*Reserved for CSIRX data for LVDS Streaming. */
DSS_L3: ORIGIN = 0x88100000, LENGTH = 0x00290000
HWA_RAM: ORIGIN = 0x82000000, LENGTH = 0x00020000

/* shared memories that are used by RTOS/NORTOS cores */
/* On C66,
* - make sure these are which mapped as non-cache in MAR bits
*/
USER_SHM_MEM : ORIGIN = 0xC02E8000, LENGTH = 0x00004000
LOG_SHM_MEM : ORIGIN = 0xC02EC000, LENGTH = 0x00004000
/* MSS mailbox memory is used as shared memory, we dont use bottom 32*6 bytes, since its used as SW queue by ipc_notify */
RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0xC5000000, LENGTH = 0x1F40
}

As shown in the figure above, DSS_L3 LENGTH = 0x00290000, which is greater than 0x200000 (2M, DSP Subsystem C66x Memory Map:DSS_L3 is 2 MBytes)。

why is that?