The only description I can find about what the nRST (warm reset) resets is in the "Cortex-R4 and Cortex-R4F Reference Manual" which just states that "This signal is the main processor reset that initializes the majority of the processor logic.".
What does majority mean, and does this include the GPIO pins and their states?
I have an external watchdog connected to the nRST pin (requirement) and need to know what exactly is reset to which state.
