AM263P4: OSPI flash ISSI IS25LX256-JHLE can be used or not?

Hi Koichiro-San,

Koichiro Tashiro said:

They have an issue with OSPI boot.
There is one difference between their custom board and TI control card (TMDSCNCD263P).
The customer uses IS25LX256-JHLE, but the control card uses IS25LX256-LHLE.
The 'L' device supports Read while Program/Erase.

Yes the flash part can be used, the difference is applicable if they are doing Firmware update while doing XIP,

As the property of NOR memory is that it does not support write while read(code xip is going on).

The part L support read while write, which is needed for FOTA.

If customer just wants to use it for OSPI boot(do not need XIP or FOTA) then it should be okay.,

Koichiro Tashiro said:

hey have an issue with OSPI boot.

What is the issuthey are facing?

Hi Nilabh,

Nilabh Anand said:

What is the issuthey are facing?

At OSPI boot, only DQ0 and DQ1 signals are working for ~720usec.
DQ2 to DQ7 signals are kept High.

This is DQ0 signal waveform.


On control card, all DQ0 to DQ7 signals are toggling.
(no waveform is taken)

Thanks and regards,
Koichiro Tashiro
 

Hi Nilabsh,

Nilabh Anand said:

If customer just wants to use it for OSPI boot(do not need XIP or FOTA) then it should be okay.,

The customer does not have a plan to use XIP nor FOTA.
BTW, it seems ISSI does not have a plan to release IS25LX256-LHLE in the market.
The customer is asking why TI selected such unique part on the EVM.
Do you know the reason?

Thanks and regards,
Koichiro Tashiro

Hi Nilabsh,

The customer has one more question.
Currently, the customer just flash SBL image at 0x6000:0000 and Application image at 0x600:81000 by Uniflash.

According to below E2E thread, "tuning parameters" need to be flashed at 0x80000 as well.
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1484037/am263p4-am263p4-sbl-boot-address-discrepancy-0x80000-vs-0x81000

I am not sure it is directly related to the issue the customer observes, but the "tuning data" is mandatory?
If so, how to flash these parameters?

Thanks and regards,
Koichiro Tashiro

Koichiro Tashiro said:

At OSPI boot, only DQ0 and DQ1 signals are working for ~720usec.
DQ2 to DQ7 signals are kept High.

This is DQ0 signal waveform.


On control card, all DQ0 to DQ7 signals are toggling.
(no waveform is taken)

Has the HW schematic for the customer board already been reviewed by TI HW team?

Koichiro Tashiro said:

The customer does not have a plan to use XIP nor FOTA.
BTW, it seems ISSI does not have a plan to release IS25LX256-LHLE in the market.
The customer is asking why TI selected such unique part on the EVM.
Do you know the reason?

We were not aware of of this issue initially, that is why we have tried to change the flash part on all future evm(like AM261x E2)

Koichiro Tashiro said:

The customer has one more question.
Currently, the customer just flash SBL image at 0x6000:0000 and Application image at 0x600:81000 by Uniflash.

According to below E2E thread, "tuning parameters" need to be flashed at 0x80000 as well.
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1484037/am263p4-am263p4-sbl-boot-address-discrepancy-0x80000-vs-0x81000

I am not sure it is directly related to the issue the customer observes, but the "tuning data" is mandatory?
If so, how to flash these parameters?

Which SDK version is customer using?

Also have they tested OSPI diagnostic example on their custom board does this work:

https://software-dl.ti.com/mcu-plus-sdk/esd/AM263PX/latest/exports/docs/api_guide_am263px/EXAMPLES_DRIVERS_OSPI_FLASH_DIAG.html

Hi Nilabh,

Nilabh Anand said:

Which SDK version is customer using?

SDK version 10.1.0.34
Sysconfig version 1.23.1

Nilabh Anand said:

Also have they tested OSPI diagnostic example on their custom board does this work:

They tested it and all tests passed. Here is log output.

[Cortex_R5_0] [OSPI Flash Diagnostic Test] Starting ...
[OSPI Flash Diagnostic Test] Flash Manufacturer ID : 0x9D
[OSPI Flash Diagnostic Test] Flash Device ID       : 0x5A19
[OSPI Flash Diagnostic Test] Executing Flash Erase on first block...
[OSPI Flash Diagnostic Test] Done !!!
[OSPI Flash Diagnostic Test] Performing Write-Read Test...
[OSPI Flash Diagnostic Test] Write-Read Test Passed!
[QSPI Flash Diagnostic Test] SFDP Information : 
================================================
                      SFDP                      
================================================
SFDP Major Revision                       : 0x1
SFDP Minor Revision                       : 0x9
Number of Parameter Headers in this Table : 4

Types of Additional Parameter Tables in this flash
---------------------------------------------------
4 BYTE ADDRESSING MODE INSTRUCTIONS TABLE
NOR SPI PROFILE TABLE 
OCTAL DDR MODE COMMAND SEQUENCE TABLE

Parsing of OCTAL DDR MODE COMMAND SEQUENCE TABLE table not yet supported. 
JSON Data for the flash :

{

	"flashSize": 33554432,
	"flashPageSize": 256,
	"flashManfId": "0x9D",
	"flashDeviceId": "0x5A19",
	"flashBlockSize": 131072,
	"flashSectorSize": 4096,
	"cmdBlockErase3B": "0xD8",
	"cmdBlockErase4B": "0xDC",
	"cmdSectorErase3B": "0x20",
	"cmdSectorErase4B": "0x21",
	"protos": {
		"p111": {
			"isDtr": false,
			"cmdRd": "0x03",
			"cmdWr": "0x02",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 0,
			"dummyClksRd": 0,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": null,
			"protoCfg": null,
			"strDtrCfg": null
		},
		"p112": null,
		"p114": null,
		"p118": {
			"isDtr": false,
			"cmdRd": "0x7C",
			"cmdWr": "0x84",
			"modeClksCmd": 0,
			"modeClksRd": 1,
			"dummyClksCmd": 0,
			"dummyClksRd": 7,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": null,
			"protoCfg": null,
			"strDtrCfg": null
		},
		"p444s": null,
		"p444d": null,
		"p888s": null,
		"p888d": {
			"isDtr": false,
			"cmdRd": "0x0B",
			"cmdWr": "0x12",
			"modeClksCmd": 0,
			"modeClksRd": 0,
			"dummyClksCmd": 8,
			"dummyClksRd": 14,
			"enableType": "0",
			"enableSeq": "0x00",
			"dummyCfg": {
				"isAddrReg": false,
				"cmdRegRd":"0x00",
				"cmdRegWr":"0x00",
				"cfgReg":"0x00000000",
				"shift":0,
				"mask":"0x00",
				"bitP":14
			},
			"protoCfg": {
				"isAddrReg": false,
				"cmdRegRd": "0x00",
				"cmdRegWr": "0x00",
				"cfgReg": "0x00000000",
				"shift": 0,
				"mask": "0x00",
				"bitP": 0
			},
			"strDtrCfg": {
				"isAddrReg": false,
				"cmdRegRd": "0x00",
				"cmdRegWr": "0x00",
				"cfgReg": "0x00000000",
				"shift": 0,
				"mask": "0x00",
				"bitP": 0
			}
		},
		"pCustom": { 
			"fxn": null
		}
	},
	"addrByteSupport": "1",
	"fourByteAddrEnSeq": "0xA1",
	"cmdExtType": "REPEAT",
	"resetType": "0x30",
	"deviceBusyType": "0",
	"cmdWren": "0x06",
	"cmdRdsr": "0x05",
	"srWip":  0,
	"srWel":  1,
	"cmdChipErase": "0xC7",
	"rdIdSettings": {
		"cmd": "0x9F",
		"numBytes": 5,
		"dummy4": 0,
		"dummy8": 0
	},
	"xspiWipRdCmd": "0x00",
	"xspiWipReg": "0x00000000",
	"xspiWipBit": 0,
	"flashDeviceBusyTimeout": 72000000,
	"flashPageProgTimeout": 120
}

Nilabh Anand said:

Has the HW schematic for the customer board already been reviewed by TI HW team?

No. But the customer thinks OSPI connection should be ok as diagnostic tests are passed.

Thanks and regards,
Koichiro Tashiro

Koichiro Tashiro said:

No. But the customer thinks OSPI connection should be ok as diagnostic tests are passed.

That may not be necessarily true, as diagnostic example uses only 1 data line(1s mode), where as this flash supports 8D mode using all 8 data lines for communication.

No harm in getting schematics verified with TI experts.

Few more questions:

what is boot pin configuration?(0000 ?) Is it configurable or fixed?

When they say ospi boot not working, are they able to see SBL prints or that is also not coming

Can they share their schematics ?

Nilabh Anand said:

Can they share their schematics ?

I will send you OSPI circuit schematics offline.

Hi Koichro-San,

Please follow through Brennan's comment of getting schematic reviewed.

I will check the things on my end and give you a confirmation by Wednesday next week.

Hi Nilabh,

Nilabh Anand said:

Please follow through Brennan's comment of getting schematic reviewed.

Thanks! I sent the checklist to the customer and asked them to apply schematic review.

Nilabh Anand said:

I will check the things on my end and give you a confirmation by Wednesday next week.

I got one update from the customer.
The device customer uses is default Extended SPI(1S-xy-xy) mode. Please see page#95 of the datasheet.
https://www.issi.com/WW/pdf/25LX-WX256-128.pdf
In this case, AM263P4 boot mode also needs to be OSPI(1S) - Single Read Mode, correct?
They are currently using OSPI(8S) - Octal Read Mode. 
TRM table 5-2: 

Thanks and regards,
Koichiro Tashiro