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ssi only work with a capacitor "pull-up"

siauhwa ong
Expert 1510 points

Hi,

I'm interfacing AD7324 , an SPI ADC, to LM4F120 launchpad SSI0.

But it only works if I connect a "pull-up" of a small capacitor (says 20pf) between 3.3V and SCLK pin. It also works if I just touch the SCLK pin with a scope probe.

It also works if I touch the DOUT pin or CS pin.

Any explanation on why it happens ?

Thank you

  • 0
    TI__Guru**** 244400 points

    Hi Siauhwa,

    Typically a scope probe has a small capacitive-inductive-resistive load associated with it (it should be mentioned in the probe data sheet), that can alter the line characteristics, which is why touching a scope probe makes it work.

    What is the configuration of SSI module for interfacing it to AD7324. I would ask you to check the following as well

    1. Is the SSI CLK frequency less than or equal to the maximum supported by AD7324

    2. Is the setup time of CS and/or DOUT of AD7324 w.r..t CLK at the AD7324 being met(you may want to use an active probe to reduce line loading)

    Regards

    Amit Ashara

  • 0
    Guru 117855 points

    siauhwa ong said:
    But it only works if I connect a "pull-up" of a small capacitor

    Some definition of, "works" seems in order.  Hundreds here/elsewhere have properly connected SPI accessory ICs to Stellaris & rebrand MCUs - w/out resorting to such, "unusual add-ons!"

    Has that SCLK pin "really" been properly set-up/config'ed as SPI Clock?  Are no other routings or unwanted connections/components "intruding" upon that pin?  Is your signal length between MCU & SPI accessory short & robust.  (i.e. test/verified)  Has that accessory IC always been powered-up "in common" w/your MCU board - such that never (even briefly) does one receive power by itself?

    There are multiple, "T's to cross and I's to dot" - prior to any SPI to Accessory - properly achieving, "On the Air" status.  Suspect this is most fruitful ground for your attention... 

    Lack of clear definition of "works" complicates any diagnosis.  It's hoped that your accessory IC resides on a well made (i.e. official eval) board and that connections have been double checked and test/verified.

  • 0 in reply to Amit Ashara
    Expert 1510 points

    Hi Amit,

    I use stellarisware ssi library for controlling the ssi adc. Is there anyway I can control the CS timing for example ?

    Os should I write to the SSI registers directly in order to gain control over the timing ?

     

    Thank you

     

  • 0
    Expert 2355 points

    Hello,

    Sounds as though you may have some ringing on the SCLK signal.  How long is the connection?  Is it a PCB trace or a loose piece of wire?  Try to reduce parasitic inductance and provide a controlled ground return path.  Once that is attended to, a small terminating resistor may be in order.

    Regards,

    Dave

  • 0 in reply to siauhwa ong
    TI__Guru**** 244400 points

    Hi Siauhwa,

    There is no control on the timing for CS. As aptly mentioned by cb1 there are details that need to be checked. Have you checked the timings of the ADC IC w.r.t Timing of the SSI from TM4C SSI Master.

    Also is this a well soldered board or assembled board with wires as this will affect the signal. Please make sure that CLK and DATA lines are well balanced so that CLK is centre aligned.

    You can change the Slew Rate of the CLK pin so that clock rises slower.

    Regards

    Amit Ashara

  • 0 in reply to SourceTwo
    Expert 1510 points

    The circuit is on a breadboard and the lenght of the cables are pretty long , around 30cm..

    I think it could contribute to the issue as well.. and along with the timing issue too

    Thank you

  • 0 in reply to siauhwa ong
    Guru 117855 points

    siauhwa ong said:
    circuit is on a breadboard and the lenght of the cables are pretty long , around 30cm..

    Believe HMS Titanic had better chance of successful, winter, northern ocean crossing...

    Quite clear now that "works" (as past used) applies only to signal generation upon one (likely overburdened) pin.  I'd wager high stack of chips that your: "lashup" - and that 30cm length - and "breadboard" combine to "doom" such effort. 

    Proper board - proper (and short/matched) signal routings - all are required for SPI "deck chairs" to remain dry/inviting.  (one notes nearly each/every design/circuit "defect" prognosticated earlier (by this reporter) - hallowed "works" raised that water-logged pennant...)  (Pennant so high/bright that even esteemed Source 2 "basked in its incandescence...")

  • 0 in reply to SourceTwo
    Guru 117855 points

    SourceTwo said:
    Sounds as though you may have some ringing

    Similar methinks - to HMS Titanic, "Taking on some water..."

  • 0 in reply to SourceTwo
    Expert 1510 points

    Thanks everyone !

     

    I haven't tried the circuit with proper wiring.  But, I believe that is the cause of the issue.

    Have a good day !

  • 0 in reply to siauhwa ong
    Guru 27665 points

    Another item to check is that you are clocking on the right edge.  If you get that wrong you can end up changing the data at the same time you are attempting to read it.  Adding a capacitance delays the edge long enough to read sucessfully.  Long cable lengths can make the problem better or worse.  

    Changing the clock frequency may give you insight into what is happening. 

    In either case cleaning up the wiring is a good thing to do.

     

    Robert

  • 0 in reply to Robert Adsett
    Expert 2975 points

    I thought I'd make a quick comment because it sounded like someone wanted to manually control the CS pin.  I've used the SSI0 bus and just connected a digital I/O in place of the actual CS pin allowing me manual control.  This is actually required (at least I couldn't get around it) when you need to dump large blocks of data on a SPI bus without toggling CS, but still have it toggle per command in command mode. 

  • 0 in reply to Robbie Valentine
    Expert 1510 points

    Thanks Robbie.

    That's what  I have in my mind too...