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Setting up an adc interrupt

Other Parts Discussed in Thread: TM4C1294NCPDT, LM3S8971

Hello,

Sorry for the simple question, I'm still new to this. I saw some similar questions posted but they didn't help me much.

I'm working on a TM4C123GL eval board.

I'm trying to invoke adc interrupts by the timer but the program doesn't enter the interrupt routine.

Hope someone can easily help me, I'm probably forgetting a crucial line or something.

This is the relevant code:  (initialize is called at the beginning of main())

void initialize()
{
//
// Enable lazy stacking for interrupt handlers. This allows floating-point
// instructions to be used within interrupt handlers, but at the expense of
// extra stack usage.
//
ROM_FPULazyStackingEnable();

//
// Set the clocking to run directly from the crystal.
//
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);

//
// Enable processor interrupts.
//
ROM_IntMasterEnable();

// Set up timer
//Timer2 for ADC cpu1
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER2);
ROM_TimerConfigure(TIMER2_BASE, TIMER_CFG_PERIODIC);
TimerConfigure(TIMER2_BASE, (TIMER_CFG_A_PERIODIC |TIMER_CFG_B_PERIODIC));
TimerLoadSet(TIMER2_BASE, TIMER_A, (SysCtlClockGet()/50)); //if just clock set so every 1 sec //if /50 every 20 mS
TimerControlTrigger(TIMER2_BASE, TIMER_A, true);
TimerEnable(TIMER2_BASE, TIMER_A);

//
// Configure the ADC.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_ADC0)));

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_0| GPIO_PIN_1| GPIO_PIN_2| GPIO_PIN_3);

ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_TIMER, 0);
ADCSequenceStepConfigure(ADC0_BASE, 2, 0, ADC_CTL_CH0);
ADCSequenceStepConfigure(ADC0_BASE, 2, 1, ADC_CTL_CH1);
ADCSequenceStepConfigure(ADC0_BASE, 2, 2, ADC_CTL_CH2);
ADCSequenceStepConfigure(ADC0_BASE, 2, 3, ADC_CTL_CH3 | ADC_CTL_END | ADC_CTL_IE);
ADCSequenceEnable(ADC0_BASE, 2);
ADCIntEnable(ADC0_BASE, 2);
}

I have the ISR that only prints a word for now and it is linked to ADC Sequence 2 in the startup_ccs file.

Thanks for the help!

Nadav

  • Stupid IE 11 blows up hour of typing auto recovers clears all typing on web page. Basically CCS compiler V5.2.7 (7M4eabi.lib) has issues with the 3rd party BSD array builders that use HWREG (hw_type.h) to retrieve sequencer data versus (adc.c) (ADSequencerDataGet).

    The symptoms were elaborated several times and code SNIP causing reported issue,  requesting a demo is thus calling poster a liar!

    HWREG sequencer read FIFO directly impacts array build data read back by application relative to END placement of configured sequencer steps.

    3rd party BSD files:

    array_del.cpp TI SLA Edison Design Group, Inc. array_new.cpp TI SLA Edison Design Group, Inc. array_nodel.cpp TI SLA Edison Design Group, Inc. array_nonew.cpp TI SLA Edison Design Group, Inc. array_pdel.cpp TI SLA Edison Design Group, Inc. array_pnew.cpp TI SLA Edison Design Group, Inc.

    Turn on debug assembler listing to witness 3rd party calls by CCS compiler (7M4eabi.lib):

  • BP101 said:
    Stupid IE 11 blows up hour of typing auto recovers clears all typing on web page. Basically CCS compiler V5.2.7 (7M4eabi.lib) has issues with the 3rd party BSD array builders that use HWREG (hw_type.h) to retrieve sequencer data versus (adc.c) (ADSequencerDataGet).

    You have provided no evidence of that (and as a side note I'm pretty certain BSD is not involved)

    BP101 said:
    The symptoms were elaborated several times and code SNIP causing reported issue,  requesting a demo is thus calling poster a liar!

    They've been repeatedly asserted and random pieces of code have been provided but no runnable example has been provided.

    BP101 said:

    3rd party BSD files:

    array_del.cpp TI SLA Edison Design Group, Inc. array_new.cpp TI SLA Edison Design Group, Inc. array_nodel.cpp TI SLA Edison Design Group, Inc. array_nonew.cpp TI SLA Edison Design Group, Inc. array_pdel.cpp TI SLA Edison Design Group, Inc. array_pnew.cpp TI SLA Edison Design Group, Inc.

    EDG is not Berkley. They are a rather well known company though. You should note that those are C++ support files for use with new and placement new. Sounds like you are dynamically allocating arrays if you are getting calls to these. That could explain a lot of your problems.

    Something that may have been quickly found except that there is

    still no runnable source to demonstrate the problem.

    Robert

    BP101 said:
    HWREG sequencer read FIFO directly impacts array build data read back by application relative to END placement of configured sequencer steps.

    Unparsable.