TM4C1294NCPDTi3 Tivaware 5.2.7, Non-OS platform:
Tivaware function call IntPriorityGroupSet() text states priority grouping values 3-7 have the same effect. Yet a 4:4 group priority split bits 7:5,15:13 etc.. become 3 high order bits of the priority value nibble for INTA,B,C,D leaving 1 subpriority bit. A 4:4 split produces 8 group priorities and 1 subpriority (bxxx.) and M3 example SW often set interrupt priority 0x10-0x90 and never saw an interrupt priority 0x01-0x09. The Tivaware statement priority value 3-7 has same effect seems an improper bit packed example (how to) using low order nibble to set INT priority and shown in table 3-9.
1. Does group priority 0xA0 have the same effect as priority 0xB0 creating an over lapping priority order, since both values high order bits overlap?
Note complier never posted warnings the value was invalid or overlapping.
2. Is the same overlap going to occur for interrupt priority 0xC0 and 0xD0?
3. Is the low order bit 4 of group priority assignment bits 7:5 table 3-9 ignored or is that considered sub priority by NVIC giving purpose to the 1st nibble bit? In other words (y) is missing in a 0x4 (4:4 split) of table 3-9 yet 1 subpriority is listed when it seems there should be no subpriority for (bxxx. ).