• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 31 subscribers
  • Views 568 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570 TRM (spnu489a) Primary System Control Registers

Marcus Frech
Intellectual 1490 points

Hello, I found 2 diferent register offsets for the registers MSINIGSTAT and MSTFAIL in the TMS570 TRM (spnu489a). The chapter 5.1 Primary System Control Registers shows the MSINIGSTAT at offset 0x64 and MSTFAIL at offset 0x68. When I press the link behind MSINIGSTAT, I get to the description of register MSTFAIL in chapter 5.1.23, which is now at offset 0x64 instead of 0x68. When I press the link behind MSTFAIL, I get to the description of register MSINIGSTAT in chapter 5.1.24, which is now at offset 0x68 instead of 0x64. What is the correct offset for the registers MSINIGSTAT and MSTFAIL? Many thanks and best regards Marcus

  • 0
    TI__Genius 14205 points

    Marcus,

    The correct offsets are
    Memory Self-Test Fail Status Register (MSTFAIL)  --> Offset 0x64
    MSTC Global Status Register (MSTCGSTAT)        --> Offset 0x68

    The chapter 5.1 Primary System Control Registers shows wrong offset, these two offsets are swapped.
    This will be fixed in the next TMS570 TRM release.