Other Parts Discussed in Thread: TPS65381A-Q1
Hi.
I am considering of using one RM57L843 to get CAT3 PLd functional safety certification.
To design any two logic in one MCU, I am concerning if those two logic can be implemented independently in one core.
(Let's say Core0 and Core1 , Core0 is logic core and Core1 is checker like lockstep does)
- In Core0, Is it possible to implement and design two different Logic1 and Logic2 without any interference between them?
- Regarding to Memory, Timing(Task) and any Communication, is it possible to implement and design Logic 1 and 2 independently without any interference?
Thanks