Dear Champs,
I am asking this for our customer.
In 6.4.1 GPIO Muxed Pins of the datasheet, it says,
The GPyGMUXn register should be configured before the GPyMUXn to avoid transient pulses on GPIOs from alternate mux selections.
It means first GPyGMUXn and then GPyMUXn.
But in TRM, it seems different.
For example, in
8.7.2.5 GPAMUX2 Register (Offset = 8h) [reset = 0h], it says,
Pins must be set to GPIO mode using this register before changing the corresponding field in the GPAGMUX2 register.
in 8.7.2.12 GPAGMUX2 Register (Offset = 22h) [reset = 0h], it says,
Pins must be set to GPIO mode using the GPAMUX2 register before changing their configuration in this register.
It means first GPAMUX2 and then GPAGMUX2.
So, what is the correct order?
For example, if we want to show ERRORSTS output on GPIO24, would you please show us the codes?
Wayne Huang
