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How to configuration ePWM

Dear Expert

I now need to configure the wave-by-wave current limiting function. With comparator 2 and comparator 3, any trigger current limiting point will block the PWM driver.

There are two comparators triggering the same event EVT2 in the TI configuration, but it is found wrong in the experiment, please help to analyze whether it can be configured like this.

//    EPwm2Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP2OUT;

//    EPwm2Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_COMP3OUT;

//    EPwm2Regs.TZDCSEL.bit.DCAEVT2       = TZ_DCAL_HI_DCAH_LOW;//Are the two signals related to And or Or?

//    EPwm2Regs.DCACTL.bit.EVT2SRCSEL     = DC_EVT2;

//    EPwm2Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;

//    EPwm2Regs.TZSEL.bit.DCAEVT2         = TZ_ENABLE;

//    EPwm2Regs.TZCTL.bit.DCAEVT2         = TZ_FORCE_LO;

//

//    EPwm2Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT;

//    EPwm2Regs.DCTRIPSEL.bit.DCBLCOMPSEL = DC_COMP3OUT;

//    EPwm2Regs.TZDCSEL.bit.DCBEVT2       = TZ_DCBL_HI_DCBH_LOW;

//    EPwm2Regs.DCBCTL.bit.EVT2SRCSEL     = DC_EVT2;

//    EPwm2Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;

//    EPwm2Regs.TZSEL.bit.DCBEVT2         = TZ_ENABLE;

//    EPwm2Regs.TZCTL.bit.DCBEVT2         = TZ_FORCE_LO;

  • Hi,

    There are two comparators triggering the same event EVT2 in the TI configuration, but it is found wrong in the experiment

    What is the issue you are facing with the configuration? when you say it's wrong, what is the specific behavior you've noticed?

    Also, what is the configuration you are trying to achieve - maybe some waveform or description would help?

  • I want to use two compare modules as cbc function,and I noticed TI handbook TZ_DCAL_HI_DCAH_LOW,because I dont know  what relation is this condition AL_HI and AH_LOW,but I want to use them as or relation,so I dont know how to do this.please notice below code!

    //    EPwm2Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP2OUT;

    //    EPwm2Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_COMP3OUT;

    //    EPwm2Regs.TZDCSEL.bit.DCAEVT2       = TZ_DCAL_HI_DCAH_LOW;//Are the two signals related to And or Or?

    //    EPwm2Regs.DCACTL.bit.EVT2SRCSEL     = DC_EVT2;

    //    EPwm2Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;

    //    EPwm2Regs.TZSEL.bit.DCAEVT2         = TZ_ENABLE;

    //    EPwm2Regs.TZCTL.bit.DCAEVT2         = TZ_FORCE_LO;

    //

    //    EPwm2Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT;

    //    EPwm2Regs.DCTRIPSEL.bit.DCBLCOMPSEL = DC_COMP3OUT;

    //    EPwm2Regs.TZDCSEL.bit.DCBEVT2       = TZ_DCBL_HI_DCBH_LOW;

    //    EPwm2Regs.DCBCTL.bit.EVT2SRCSEL     = DC_EVT2;

    //    EPwm2Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;

    //    EPwm2Regs.TZSEL.bit.DCBEVT2         = TZ_ENABLE;

    //    EPwm2Regs.TZCTL.bit.DCBEVT2         = TZ_FORCE_LO;

  • Hi,

    TZ_DCAL_HI_DCAH_LOW


    it means that corresponding DCxEVTy is generated when DCAH low, DCAL high.
    In your case you've configured DCAEVT2 for that purpose.

    TZ_DCBL_HI_DCBH_LOW

    Similarly, here DCBEVT2 the event is generated when DCBH low, DCBL high

  • I used two comparators to compare the implementation of wave-by-wave current limiting. Any one of them needs to block the driver to output effectively. I saw the configuration option AH_LOW_AL_HIG in the TI manual.

    I use one comparator to generate AH_LOW and another comparator to generate AH_HIG. I want to generate wave by wave as long as one valid both trigger event 2, but I find this can not be achieved in my experiment. I analyze the reason is that the two conditions of AH_LOW and AL_HIG are the relation of "AND", and I want to achieve the relation of "OR".So this configuration cannot be implemented.Also, if it is "And " relationship ,Where is this used?

  • Hi,

    Yes, TZ_DCAL_HI_DCAH_LOW means that corresponding DCxEVTy is generated when DCAH low AND DCAL high. Not an OR condition.