Hi team,
I got a question form customer.
when I use the file SPLL_1ph.h to implement phase lock. The setting is use the Epwm interrupt to do the isr, the frequency is 5k Hz, so I use the command "SPLL_1PH_NOTCH_config(spll1,50,5000,222.2862,-222.034,0.25,0.00001)" to get the result, but it seems have some problem, and don't output the right voltage frequency. Can you help me to figure out what's the problem is?
Thank you.
