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TMS320F280049C-Q1: DBCTL setting

Part Number: TMS320F280049C-Q1
Other Parts Discussed in Thread: DRV8320

Hi, For F280049C+DRV8320, there are some strange setting as below:

We should set the AHC mode, however the actual setting is ALC mode.(POLSEL = 0x01)

in hal.c file and HAL_setupPWMs() function,

        // configure the right polarity for active high complementary config.
        EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                      EPWM_DB_RED,
                                      EPWM_DB_POLARITY_ACTIVE_HIGH);
        EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                      EPWM_DB_FED,
                                      EPWM_DB_POLARITY_ACTIVE_LOW);

And,the EPWMSOCA is triggered by EPWM_COUNTER_COMPARE_C near 0. It should work for AHC mode.

Please confirm that if I am right or not for the understanding of the POLSEL setting for F280049C

Regards

Arrow