• State Resolved
  • Locked Locked
  • Replies 16 replies
  • Subscribers 85 subscribers
  • Views 646 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280049C: CRC table user specified table name has two linker generated symbol addresses

Abayomi Babatola
Prodigy 150 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

The linker generated symbol name for my CRC table user_specified_table_name allocates a different/new address and the programe uses this new address for the run time code to calculate the CRC.  Hence the CRC does not work.

 Below is the CRC generated data after building and linking

LINKER GENERATED CRC TABLES

page0_crc_table @ 00085938 records: 8, size/record: 8, table size: 66
.cinit: algorithm=CRC32_PRIME(ID=0), page=0, load addr=000815e8, size=00000154, CRC=de66b93b
.pinit: algorithm=CRC32_PRIME(ID=0), page=0, load addr=0008173c, size=00000006, CRC=3c6ee8ab
.text.1: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00081744, size=000008bc, CRC=6e143b1b
.text.2: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00082000, size=00001000, CRC=ecbb58db
.text.3: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00083000, size=00001000, CRC=81cf7677
.econst: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00084000, size=00000614, CRC=3bc27337
.text.4: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00084614, size=000009ec, CRC=5571944b
.text.5: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00085000, size=00000938, CRC=7a0e9afe

Below is the linker generated symbol names and the allocated address.  This was gotten from the .map file of the build and liking of code

Line 342: 00085938 00000042 (.TI.crctab:page0_crc_table)
Line 1407: page0_crc_table @ 00085938 records: 8, size/record: 8, table size: 66
Line 1600: 0000ae02 2b8 (0000ae00) _page0_crc_table
Line 1934: 0 00085938 __TI_CRC_page0_crc_table
Line 2054: 1 0000ae02 _page0_crc_table
Line 2094: 0 00085938 page0_crc_table
Line 2345: 0 00085938 __TI_CRC_page0_crc_table
Line 2346: 0 00085938 page0_crc_table
Line 2458: 1 0000ae02 _page0_crc_table

The address has been changed from 0x00085938  to 0x0000ae02  and the code uses the new (0x0000ae02, which is wrong) to do the run time CRC calculation.  

My CRC code is below

in the .h file

extern CRC_TABLE page0_crc_table; // linker generated object (crc table)
extern uint32 crc32_table[256]; //Lookup table for the CRC32 polynomial 0x04C11DB7

.cpp file 

/**< private variable definition for file */
CRC_TABLE page0_crc_table; // linker generated object (crc table)
CRC_TABLE *saf_crc::pLinker_crc_table = (CRC_TABLE*)&page0_crc_table;
//CRC_TABLE *saf_crc::pLinker_crc_table = (CRC_TABLE*)0x00085938; //work around
uint32 crc32_table[256]; //Lookup table for the CRC32 polynomial 0x04C11DB7

void saf_crc::InitCRC(void)
{
CRC_reset ();
genCRC32Table();
}

void saf_crc::CRCCalPage0(CRC_TABLE *p_crc_table)
{
uint16_t cou = 0;
uint32_t crc_cal_val;
for (cou = 0; cou < p_crc_table->num_recs; cou++ )
{
crc_cal_val = getCRC32_cpu(INIT_CRC32, (uint16*)(p_crc_table->recs[cou].addr), (CRC_parity_e)CRC_parity_even, ((p_crc_table->recs[cou].size) << 1));
if (crc_cal_val != p_crc_table->recs[cou].crc_value)
{
//TODO
//crc value not correct error
uint16_t abc;
if (crc_cal_val ==888)
{
abc = 0;
}
}


}
}

void saf_crc::CRCCal(void)
{
saf_crc::CRCCalPage0(saf_crc::pLinker_crc_table );

}

This work around works just fine

//CRC_TABLE *saf_crc::pLinker_crc_table = (CRC_TABLE*)0x00085938; //work around

But of course i am not to use this in the final code.

Please what can the problem be.  I have read the entire compiler and assembler documentation and checked the pointer usage in the code but i could not solve it.  Does it have to do with the mixing of c++ and c code or some compiler settings.

Thanks.

  • 0
    TI__Guru**** 161575 points

    Our expert on this is out today but will take a look at this tomorrow.

    Regards,

    John

  • 0
    Guru 92251 points
    Abayomi Babatola said:
    The address has been changed from 0x00085938  to 0x0000ae02

    The address 0x00085938 is in FLASH, and the address 0x0000ae02 is in RAM.

    Abayomi Babatola said:

    in the .h file

    extern CRC_TABLE page0_crc_table; // linker generated object (crc table)
    extern uint32 crc32_table[256]; //Lookup table for the CRC32 polynomial 0x04C11DB7

    Since the page0_crc_table is not const qualified, perhaps it is given a load address in FLASH and a run address in RAM.

    What happens if you try:

    Fullscreen
    1
    extern const CRC_TABLE page0_crc_table; // linker generated object (crc table)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • 0
    TI__Guru**** 244280 points

    Because I cannot see the crc_table lines in the linker command file, I cannot be certain of the cause of the problem.  But I am very confident that this error occurs.

    Please search the C28x assembly tools manual for the term my_crc_table_for_a1.  This is a symbol name which appears in some CRC examples.  Carefully notice how this symbol name is written in the C (or C++) code with no leading underscore, but in the linker command file it starts with an underscore.  In the linker command file, for example, it is written crc_table(_my_crc_table_for_a1), and not crc_table(my_crc_table_for_a1).

    This is the case when you build with the older COFF ABI.  If you build with the newer EABI, different symbol naming conventions are used.  For further details, please search the same manual for the sub-chapter titled Specifying C/C++ Symbols with Linker Options.

    Please let me know if this suggestion resolves the problem.

    Thanks and regards,

    -George

  • 0 in reply to Chester Gillon
    Prodigy 150 points

    Hi Gillon,

    Thanks for the reply.

    I already tried this solution and method but it did not work.  I tried it just now again and still it did not solve the problem

  • 0 in reply to George Mock
    Prodigy 150 points

    Hello George,

    I already tried the option of the _my_crc_table_name but it did not work.  Here is a section of my .cmd file

    /* Program memory (PAGE 0) sections */
    codestart : > BEGIN, PAGE = 0, ALIGN(4)
    .text : >>FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3 |FLASH_BANK0_SEC4 |FLASH_BANK0_SEC5
    PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    .cinit : > FLASH_BANK0_SEC15, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    .pinit : > FLASH_BANK0_SEC15, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    //Global and static const variables that are explicitly initialized
    .econst : > FLASH_BANK0_SEC14, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    //.switch : > FLASH_BANK0_SEC1, PAGE = 0, ALIGN(4) //empty
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    I also checked the new address the crc_table_name and what it contains. it is empty

    0x0000AE00 _page0_crc_table
    0x0000AE00 0000 0000
    0x0000AE02 0000 0000 0000 0000 0000 0000 0000 0000
    0x0000AE0A uti_adc::accu_adc_result
    0x0000AE0A 0000

    Please where else can I check.  I would read up the assembly guide once again.

    Thanks

  • 0 in reply to Abayomi Babatola
    TI__Guru**** 244280 points

    I presume you build with the older COFF ABI, and not the newer EABI.  Is that correct?

    There should be only one symbol named _page0_crc_table, and no symbol named page0_crc_table.  Is this the case?

    Your linker command file should have an entry for allocation of the CRC table itself, similar to ...

    Fullscreen
    1
    .TI.crctab > MEMORY_RANGE_NAME
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Do you have this line?  Is this CRC table in flash or RAM?  If it is in RAM, how does this RAM get loaded with the contents of the .TI.crctab section?

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Prodigy 150 points

    Hi,

    Thanks for your reply.

    I am using the older  COFF ABI build.  There are two "page0_crc_table" symbols  i. _page0_crc_table and __page0_crc_table

    The .TI.crctab > MEMORY_RANGE_NAME is added to the .cmd file

    I think the problem is the function saf_crc_cal.cpp been linked to the .ebss.  This is strange as the saf_crc_cal.cpp is part of the fucntion code and it is the function that handles the CRC saf_crc_cal -> saety_CRC_Calculation. Below is extracted from the .map file

    Line 249: 00085000 0000003a (.TI.crctab:_page0_crc_table)
    Line 316: 0000ae00 0000000a saf_crc_cal.obj (.ebss:__page0_crc_table)
    Line 1413: _page0_crc_table @ 00085000 records: 7, size/record: 8, table size: 58
    Line 1604: 0000ae00 2b8 (0000ae00) __page0_crc_table
    Line 1944: 0 00085000 __TI_CRC__page0_crc_table
    Line 2002: 1 0000ae00 __page0_crc_table
    Line 2065: 0 00085000 _page0_crc_table
    Line 2353: 0 00085000 __TI_CRC__page0_crc_table
    Line 2354: 0 00085000 _page0_crc_table
    Line 2472: 1 0000ae00 __page0_crc_table

    Why is the function linked to .ebss when it is infact code.  I have already shared the crc codes above.  Thanks

  • 0 in reply to Abayomi Babatola
    TI__Guru**** 244280 points

    Let's work on one thing at a time.

    Abayomi Babatola said:
    There are two "page0_crc_table" symbols  i. _page0_crc_table and __page0_crc_table

    There should only be one.  If you spell it _page0_crc_table in the linker command file, and page0_crc_table in the C++ code, then there will be only one symbol in the linker map file, spelled _page0_crc_table.  Is this what you are doing?

    Thanks and regards,

    -George

  • +1 in reply to George Mock
    Prodigy 150 points

    The symbol name is the same in both the linker command file and the c++ code - _page0_crc_table.  

    .h file

    /**< external defines */
    extern const CRC_TABLE _page0_crc_table; // linker generated object (crc table)
    extern uint32 crc32_table[256]; //Lookup table for the CRC32 polynomial 0x04C11DB7

    class saf_crc
    {
    public:
    static void InitCRC(void);
    static void CRCCal(void);

    private:
    static void CRCCalPage0(const CRC_TABLE *p_crc_table);
    static const CRC_TABLE *pLinker_crc_table; //linker generated variables defining the load and run placements of the testInput vector

    };

     .cpp file

    const CRC_TABLE _page0_crc_table; // linker generated object (crc table)
    const CRC_TABLE *saf_crc::pLinker_crc_table = &_page0_crc_table;
    //const CRC_TABLE *saf_crc::pLinker_crc_table = (CRC_TABLE*)0x00085000; //work around
    uint32 crc32_table[256]; //Lookup table for the CRC32 polynomial 0x04C11DB7

    /**
    * @brief initialize the class
    * @param void
    * @retval None
    * @brief
    * @extract
    */
    void saf_crc::InitCRC(void)
    {
    CRC_reset ();
    genCRC32Table();
    }


    /**
    * @brief do CRC calculation for constant memory area
    * @param CRC_TABLE *p_crc_table generated by the linker
    * @retval None
    * @brief
    * @extract
    */
    void saf_crc::CRCCalPage0(const CRC_TABLE *p_crc_table)
    {
    uint16_t cou = 0;
    uint32_t crc_cal_val;
    for (cou = 0; cou < p_crc_table->num_recs; cou++ )
    {
    crc_cal_val = getCRC32_cpu(INIT_CRC32, (uint16*)(p_crc_table->recs[cou].addr), (CRC_parity_e)CRC_parity_even, ((p_crc_table->recs[cou].size) << 1));
    if (crc_cal_val != p_crc_table->recs[cou].crc_value)
    {
    //TODO
    //crc value not correct error
    uint16_t abc;
    if (crc_cal_val ==888)
    {
    abc = 0;
    }
    }


    }
    }

    void saf_crc::CRCCal(void)
    {
    saf_crc::CRCCalPage0(saf_crc::pLinker_crc_table );

    }

    Extract from the .map file

    LINKER GENERATED CRC TABLES

    _page0_crc_table @ 00086000 records: 7, size/record: 8, table size: 58
    .text.1: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00081000, size=00001000, CRC=a3df0f9c
    .text.2: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00082000, size=00001000, CRC=ee28b1ef
    .text.3: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00083000, size=00001000, CRC=186d4e6f
    .text.4: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00084000, size=00000c1d, CRC=5ad4081a
    .econst: algorithm=CRC32_PRIME(ID=0), page=0, load addr=0008e000, size=0000067a, CRC=128d4465
    .cinit: algorithm=CRC32_PRIME(ID=0), page=0, load addr=0008f000, size=00000154, CRC=96f05afe
    .pinit: algorithm=CRC32_PRIME(ID=0), page=0, load addr=0008f154, size=00000006, CRC=dcbee030

    Search "_page0_crc_table" (10 hits in 1 file of 1 searched)
    Line 249: 00086000 0000003a (.TI.crctab:_page0_crc_table)
    Line 316: 0000ae00 0000000a saf_crc_cal.obj (.ebss:__page0_crc_table)
    Line 1413: _page0_crc_table @ 00086000 records: 7, size/record: 8, table size: 58
    Line 1604: 0000ae00 2b8 (0000ae00) __page0_crc_table
    Line 1944: 0 00086000 __TI_CRC__page0_crc_table
    Line 2002: 1 0000ae00 __page0_crc_table
    Line 2065: 0 00086000 _page0_crc_table
    Line 2353: 0 00086000 __TI_CRC__page0_crc_table
    Line 2354: 0 00086000 _page0_crc_table
    Line 2472: 1 0000ae00 __page0_crc_table

    We observe that a new and additional symbol is defined here.  

    Thanks

  • +1 in reply to Abayomi Babatola
    TI__Guru**** 244280 points
    Abayomi Babatola said:
    The symbol name is the same in both the linker command file and the c++ code - _page0_crc_table.  

    That is incorrect.  In C++ code, in both .cpp and .h files, write the name page0_crc_table, without a leading underscore.  In the linker command file, write the name _page0_crc_table, with a leading underscore.

    This change will fix some of the problems.  Please let me know what problems remain.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Prodigy 150 points

    Hi George,

    I have previously treid this and i just tried it again but it did not solve the problem.

    I got a warning message:-

    #10272-D section relative symbols from different output sections cannot be mixed; "_page0_crc_table" is in section ".ebss", "DOT operator" is in section ".TI.crctab"

    Extract from the .map file

    Line 249: 00086000 0000003a (.TI.crctab:_page0_crc_table)
    Line 318: 0000ae14 0000000a saf_crc_cal.obj (.ebss:_page0_crc_table)
    Line 1413: _page0_crc_table @ 00086000 records: 7, size/record: 8, table size: 58
    Line 1943: 0 00086000 __TI_CRC__page0_crc_table
    Line 2063: abs 00086000 _page0_crc_table
    Line 2351: 0 00086000 __TI_CRC__page0_crc_table
    Line 2521: abs 00086000 _page0_crc_table

    Here is my linker command file

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002

    RAMLS0 : origin = 0x008000, length = 0x000800 //for ram function calls
    RAMLS1 : origin = 0x008800, length = 0x000800 //for ram function calls
    RAMLS2 : origin = 0x009000, length = 0x000800 //for CLA routine
    RAMLS3 : origin = 0x009800, length = 0x000800 //for CLA routine
    RESET : origin = 0x3FFFC0, length = 0x000002

    /* Flash sectors */
    /* BANK 0 */
    FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
    FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */

    /* BANK 1 */
    FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */

    PAGE 1 :

    BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */

    /* dedicated RAM to CPU */
    RAMM0 : origin = 0x0000F5, length = 0x00030B /* M0 RAM */
    RAMM1 : origin = 0x000400, length = 0x0005FF /* on-chip RAM block M1 */

    /* for data exchange between CPU and CLA */
    CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080 /* CLA to CPU Message RAM, DCSM secure */
    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080 /* CPU to CLA Message RAM, DCSM secure */

    /* shared between CPU and CLA */
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS6 : origin = 0x00B000, length = 0x000800
    RAMLS7 : origin = 0x00B800, length = 0x000800

    /* shared between CPU and DMA */
    RAMGS0 : origin = 0x00C000, length = 0x002000
    RAMGS1 : origin = 0x00E000, length = 0x002000
    RAMGS2 : origin = 0x010000, length = 0x002000
    RAMGS3 : origin = 0x012000, length = 0x002000
    }


    /*** Compiler Required Sections ***/
    SECTIONS
    {

    /* Program memory (PAGE 0) sections */
    codestart : > BEGIN, PAGE = 0, ALIGN(4)
    .text : >>FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3 |FLASH_BANK0_SEC4 |FLASH_BANK0_SEC5 |FLASH_BANK0_SEC6
    |RAMLS0 |RAMLS1 |RAMLS2 |RAMLS3, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    .cinit : > FLASH_BANK0_SEC15, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    .pinit : > FLASH_BANK0_SEC15, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    //Global and static const variables that are explicitly initialized
    .econst : > FLASH_BANK0_SEC14, PAGE = 0, ALIGN(4), crc_table(_page0_crc_table, algorithm = CRC32_PRIME)
    //.switch : > FLASH_BANK0_SEC1, PAGE = 0, ALIGN(4) //empty
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    /* Data Memory (PAGE 1) sections */
    .stack : > RAMM0, PAGE = 1
    .ebss : > RAMM1 |RAMLS5, PAGE = 1 //global and static variables for COFF only //TODO verify if that is large enough
    .esysmem : > RAMLS5 | RAMLS6, PAGE = 1 //Memory for malloc functions (heap) for COFF only
    .cio : > RAMGS3, PAGE = 1


    /*** CLA Compiler Required Sections ***/
    .scratchpad : > RAMLS7, PAGE = 1 /* Scratchpad memory for the CLA C Compiler */

    /* Section Ramfuncs used by file device.c. */
    .TI.ramfunc : {} LOAD = FLASH_BANK0_SEC13,
    RUN = RAMLS0 | RAMLS1,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)

    .TI.crctab : {} > FLASH_BANK0_SEC6

    /*** User Defined Sections ***/ /* Used by file CodeStartBranch.asm */
    dmaMemBufs : > RAMGS3, PAGE = 1 /* Link to DMA accessible memory */
    Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1 /* Link to CLA Message RAM */
    CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1 /* Link to CLA Message RAM */
    //Cla1Data1 : > RAMLS5, PAGE = 1 /* Link to CLA Data RAM */
    //Cla1Data2 : > RAMLS7, PAGE = 1 /* Link to CLA Data RAM */

    /* Section Cla1Prog used by file Cla.c */
    Cla1Prog : LOAD = FLASH_BANK0_SEC1_15, PAGE = 0 /* Load to flash, run from CLA Program RAM */
    RUN = RAMLS2 | RAMLS3, PAGE = 0
    LOAD_START(Cla1ProgLoadStart),
    LOAD_SIZE(Cla1ProgLoadSize),
    RUN_START(Cla1ProgRunStart)
    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

    Thanks

  • 0 in reply to Abayomi Babatola
    TI__Guru**** 244280 points

    I'm not certain of the problem, but I have a good guess. 

    I think you are defining page0_crc_table two times.  Keep the definition that occurs in the linker command file.  Remove the one in the .cpp file(s).

    Fullscreen
    1
    2
    /* Do NOT have this line in any C++ file */
    const CRC_TABLE page0_crc_table; // linker generated object (crc table)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    However, keep this line in a .h file ...

    Fullscreen
    1
    2
    /* In a header file */
    extern const CRC_TABLE page0_crc_table; // linker generated object (crc table)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    That should cause some improvement.  Please let me know what problems remain.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Prodigy 150 points

    Hi George,

    Thanks.

    I just tried it and I got a link error.

    undefined                              first referenced
    symbol                                      in file
    ---------                                 ----------------
    _page0_crc_table             ./safety/saf_crc_cal.obj

    Thanks

  • 0 in reply to Abayomi Babatola
    TI__Guru**** 244280 points

    For the source file saf_crc_cal.cpp, please follow the directions in the article How to Submit a Compiler Test Case.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Prodigy 150 points

    I would like to ask if this could be the problem.

    I got an error message when compiling my codes.  This is the error message below

    >> Compilation failure
    hw/subdir_rules.mk:9: recipe for target 'hw/hw_timer.obj' failed
    "C:/ti/c2000/C2000Ware_3_03_00_00/libraries/dsp/VCU/c28/include/vcu0/vcu0_types.h", line 117: error #85: invalid combination of type specifiers

    So I commented out this code below:

    #ifndef _STDBOOL
    #define _STDBOOL
    typedef unsigned long bool;
    #endif /* _STDBOOL */

    This code is in the VCU0_types.h.  Then my codes compiled without an error.

    Could this be responsible for the problem i have with the CRC calculation.

    I would act on the above recommendation soon.

    Thanks.

  • 0 in reply to Abayomi Babatola
    TI__Guru**** 244280 points

    This issue was discussed in this forum thread.

    Abayomi Babatola said:
    Could this be responsible for the problem i have with the CRC calculation.

    No.

    Please submit the test case I requested in my last post.

    Thanks and regards,

    -George