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TMS320F28065: CPU reset

Ravi H
Expert 1475 points
Part Number: TMS320F28065


Sir,

I wanted to monitor CPU reset on flash program load. Im monitoring SysCtrlRegs.WDCR regiter 7th bit (WDFLAG) to check for Watchdog reset. If not Im assuming POR/ BOR as XRS is not in use.

When I erase flash and load the above WDFLAG monitoring works. But when I do POR it isnt working. On POR WDFLAG remains 1.

Please guide.

  • 0
    TI__Prodigy 440 points

    Please expect some delay in the response as 31-May is a TI Holiday

  • 0
    TI__Guru* 95315 points

    I regret I do not understand what your issue is or what problem you are trying to solve. A reset should not be allowed to occur during flash programming. Depending on when reset happens during the Erase/Program process, it could permanently lock the device.

    Ravi H said:
    I wanted to monitor CPU reset on flash program load.

    Why do you expect a reset during flash programming? If a brown-out occurs, that means you need to redesign your power stage.

    Ravi H said:
    Im monitoring SysCtrlRegs.WDCR regiter 7th bit (WDFLAG) to check for Watchdog reset.

    Please read this link very carefully if you want to use WDFLAG: http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/826349.