F28375D DMA limitations

Robert Wolfe

Hello,

I'm trying to setup various DMA operations on the 28375D Defino, on core 2. I've found that I cannot get a DMA to complete successfully when it is sourced from Flash (const values defined in FLASHF), or when "const" is applied to a GSx source. Can you confirm these types of sources are not allowed?

Also, I've not had a lot of luck with LSx used as either source or destination of a DMA operation. Should that be allowed?

In all cases above, the DMA register settings are correct, and seem to be processed correctly, but yet the destination results do not end up in the source. If using just GSx, and same exact DMA setup, they do.

Regards,

Robert

over 4 years ago

+1 MatthewPate over 4 years ago

TI__Guru* 81970 points

Robert,

Thanks for reaching out to the E2E forums.

The DMA does not have access to the flash memory or the Lx memories. Here is the functional block diagram that shows the bus connections on the device.

For the Gx RAMs both CPU1:DMA1/CPU2:DMA2 always have read access, write access is determined by the GSxMSEL setting per the table below:

This table is in the TRM on page 133 as well.

Best,

Matthew

0 Robert Wolfe over 4 years ago in reply to MatthewPate

Mastermind 7860 points

Thanks Matthew, for the reply and information. Of course, it would have been great to have DMA access to those other memories too, but it is what it is!

Robert

P.S. Ended up also finding confirmation in section 9.8 of the data sheet

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F28375D DMA limitations