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Original question:
Related question to "unintentional interrupt mask" I posted before. In that case, PIEACK of XINT was not cleared because of INTM usage violation (errata usage note 5.1.2). There was one more strange thing which is that the ISR of XINT was started even PIEACK is not cleard after about 300 micro seconds at the same time when an ISR of SPIRXINTA is called. Did this happen due to INTM usage violation also? Did it last that long? Or did the ISR of SPIRXINTA remove the blockage somehow?
toshi tat,
From a hardware interrupt perspective, I do not see how the SPI interrupt would unblock a pending XINT interrupt. The PIEACKx for XINT should continue to mask the interrupt.
However, since you are using software-based interrupt nesting, which suppresses the normal hardware interrupt behavior, I suppose it is possible that the nesting software could have detected the pending XINT PIEACK status and executed the ISR through the custom interrupt dispatch software.
-Tommy
