TMS320F28388D: Inquiry

Dear TI Team

I'll repeat the inquiry Chris already forwarded to you (on my bahalf), just to check (once again) if I am still affected by the recent changes in the E2E forum posting policy, and to add few more facts.

First issue is related to the scalability of the ECS solutions based on the F28388D MCU, i.e. "clustering" capabilities of the potential SoM aimed for demanding embedded control systems, based on F28388D chip. It may be required if target ECS project requirements surpass capabilities (internal resources) of a single F28388D MCU chip (due to complexity of the mission critical target system to be controlled by the compact ECS and/or due to the distributed character of the target control system. FSI specs seem promising, but there is no recommendation for the network topology (e.g. ring, double ring, double star etc.) if project requires some redundancy, i.e. SPoF-less ECS implementation.
Besides, any TI document containing MCU networking topology reflections on the topologies of more complex power converters (e.g. Modular Multilevel Converters), as well as synchronization strategies (for system clock, cyclic tasks, PWM-s etc.) among the F28388D based nodes, would be appreciated.   

Second issue is actually related to the advice for the most efficient method to detect non-regular floating-point values (±INF...) of variables/sigs. I would like to monitor few variables and activate internal signal recorder to identify the circumstances which could have lead to that unregular FP values.

This issue, (detection of non-regular single-precision FP values like +INF, -INF etc.) and generation of corresponding logical signals (e.g. for activation of internal recorders) is currently even more more important for the team dealing with ECS applications based on the F28335 MCU chips. 

Best regards

Nenad

Hi,

According to te C28x Extended ISA document (www.ti.com/.../spruhs1c)

Overflow occurs when an operation generates a value that is too large to represent in the given floating point
format. Under such cases, a ± Infinity value is returned. If a TMU operation generates an overflow
condition, then the latched overflow flag (LVF) is set to 1. The LVF flag will remain latched until cleared by
the user executing an instruction that clears the flag.

You can check the LVF flag in the STF register. Infinity is represented as NaN and a NaN input is interpreted as infinity by the FPU. 

Hope this helps.

-Shantanu

Hi Shantanu

Thank you for provided information, which I forwarded immediately to my colleagues (at the office). 

By the way, since I am currently in the field, at the facility where that ECS system is implemented (and do not have to much time to wait for usual procedure of system software maintenance, because every hour less of the down-time counts...) it would be highly appreciated if you could provide me a sequence of C28x assembler instructions needed to directly implement your suggested workaround.

I just wonder is there a possibility for similar scenario (and workaround, of course) when double-precision floating-point unit, CLA core or some other similar F28388D subsystem is employed?

Hopefully, this will help me track down the cause of these very rare (unwanted and unexpected) ±INF events.

Best regards and thanks for your assistance.

Nenad   

For your query 1 on FSI networking and sync

FSI is a valuable IP that are being used in many multi-node applications. Refer to the following TI designs and app. notes that can add more light into the use case for FSI.

FSI Adapter Board User’s Guide

https://www.ti.com/lit/pdf/swru555

Using the Fast Serial Interface (FSI) With Multiple Devices in an Application (Rev. C)

https://www.ti.com/lit/pdf/spracm3

Distributed multi-axis servo drive over fast serial interface (FSI) reference design

https://www.ti.com/tool/TIDM-02006

Hi Ramesh,

I really appreciate your suggestions. Nevertheless, I can only say that I have already consulted the mentioned documents related to FSI specifications, reference designs etc. However, almost all TI reference designs discussed in these documents employ either low-power (<500kW) and/or low-voltage (<2000V) implementations of simple power converter topologies. My inquiry is intended to address process synchronization among the F28388D based nodes at (sub)microsecond levels, providing foundations for highly reliable and scalable ECS hardware/software cores, acting virtually as a single multi-multi-core MCU, that can handle ever more complex power topologies, enable "smooth" (PWM phase-interleaved, load-balanced etc.) operation as well as safe/reliable coordinated (and deterministic) protection of several such converters, or certain number of power-electronics building blocks... 

Furthermore, topologies that include some redundancy (e.g. double-star, double-ring) are not mentioned and analyzed. What is the impact of FSI line drivers (isolated or non-isolated RS-485, LVDS variants) on the FSI signals propagation delays. Even if F28388D based communication nodes are interconnected by fiber-optic links, the question is how to compensate FSI skew in such implementations (taking into account impact of the fiber-optics...)? Does suggested FSI skew compensation approach apply in that case as well? 

Best regards

Nenad

Forgot this one

Distributed Power Control Architecture With Multiple MCUs Over FSI

https://www.ti.com/lit/pdf/spracr6

Hi 

thank you for your enlightening remarks. You are absolutely right about TI reference designs purpose. It was rather incorrect to request from TI reference designs, solutions for more demanding power electronic projects (related to high-power, multi-level, distributed power generation...). Nevertheless, several answers from previous discussion, helped me confirm my F28388D MCU choice as the vital component in our pending project of the compact ECS solution for demanding applications. Furthermore, almost all information from this inquiry thread (particularly some facts related to FSI capabilities) support my MCU choice, when presenting the scalability possibilities of the future ECS platform, to all other team-colleagues.

Thus, provided information definitely helps in summing all the most relevant facts concerning FSI based networking. 

Therefore, I am very grateful for provided information...

Thank you all for your assistance

Best regards

Nenad 

Hi Ramesh,

I do not know why, but I do not see "resolved" link (on any of related webpages, reffering to the Inquiry) to close the thread. Perhaps because the thread was initiated by Chris (who forwarded this request on my behalf, because I was still affected by the recent changes in the E2E forum posting policy...

Thanks for assistance

Best regards

Nenad

Ok then, I will close the thread.