Part Number: TMS320F28386D
Hi,
What would be the exact sequence to recover, non automatically, from a bus-off state ?
It's not really clearly written in the TRM.
My understanding is the following:
- Reset of the Init bit from the CAN_CTL register
- Wait for the error counter to be reset or timeout after 129 x 11 CAN bit time
- Eventually during the wait, check the Bit0 error code is written to the CAN_ES register every 11 CAN bit time (11 recessive bits)
Did I miss something ?
Best regards,
Clément
