TMS320F280048-Q1: How to make an overrun error with LIN

Hi Hitoshi,

I will need some time to think through this and discuss with team. Let me get back to you early next week.

Best Regards,

Nirav

Hi Hitoshi,

Apologize for delay in response.

Can you share more details on how customer created Overrun situation? Did they keep receiving data which got shifted from SCIRXSHF register to RDy register without them reading RDy registers?

Best Regards,

Nirav

Hi Nirav,

Yes, the customer did. 
Your understanding is correct.

Just for info.
I have checked the OE with SCI(UART) by using an example code "sci_ex1_echoback."
When I use FIFO, OE have never occurred. But the RXFFOVF was set.
On the other hand, if the FIFO is not used, the OE bit is set easily when the RSCIRXBUF is not read during receiving the data.

I was not able to test LIN yet. 
I will ask the customer to disable the multi-buffered mode just for the experiment.
LinaRegs.SCIGCR1.bit.MBUFMODE = 0; //Buffers Mode 0 disable, 1 enable
Will get back to you later.

Best regards,
Hitoshi

Hi Hitoshi,

Thanks for the update.

Best Regards,

Nirav

Hi Nirav,

The customer has confirmed that OE occurred if the multi-buffered mode is off. However, they need to use the multi-buffer mode.
I would very appreciate if you could check with the designer about the OE function with the Multi-buffered mode is ON.

It seems that the receiving data is read internally and automatically so the OE never occurs.
We would like to know whether it is our specification or not.

Thank you for your kind support.
Best regards,
Hitoshi

Hi Hitoshi,

That is interesting finding, let me check with design team. It may take a week for them to get back, since they are busy with new device PG.

Thanks & Regards,

Nirav

Hi Nirav,

I think it is our specification like FIFO usage with SCI.
Anyway, thank you so much for working with the design team.
Will inform the customer that it may take a week to get the observation result.

Thank you again for your help.
Best regards,
Hitoshi

Ok got it. Thanks.