• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 296 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28375S: TMS320F28375S-PZP CANCLK frequency

Shreni P
Prodigy 110 points
Part Number: TMS320F28375S


Hi,

It is mentioned in the TMS320F28375S Technical ref manual that an operating bit rate of 1Mbps can be obtained from using a min CANCLK frequency of 8MHz. May I know the possible limitations of using higher CANCLK frequency (about 200MHz) for the same bit rate of 1Mbps.

Thanks

  • 0
    TI__Mastermind 19795 points

    Hi,

    Thanks for your question! Typically a higher clock frequency will provide more granularity in bit timing choices at the high end. On the low end, when you use a CAN bit clock of 200 MHz, the smallest baud rate possible is 7.8125 kbps.

    Depending on the system setup, you may want to tweak the actual bit timing parameters a bit. Here is a link to the CAN bit timing calculator document:

    EDIT: Added link here: https://www.ti.com/lit/sprac35

    Within that document is a link to an Excel spreadsheet for you to enter your specific system parameters like CAN clock frequency, Bit rate, Bus length, propagation delay, etc.(also located here for convenience: http://www.ti.com/lit/zip/sprac35). This will show you what bit timing parameters are possible/recommended/best for the use-case.

    It's contains quite a bit of information, but I think it is useful when determining limitations for a system like you mentioned. Let me know if you have questions!

    Regards,

    Vince

  • 0 in reply to Vince
    Prodigy 110 points

    Hi Vince Toledo,

    Thanks for your reply. I found it helpful.

    As you said, I observed in Excel, that more number of bit timing parameters with 0% error are possible at higher CAN clock frequency than that of the lower clock.

    I am just curious to know if there will be any limitation of higher power consumption while using such high CAN clock.

    Thanks

  • +1 in reply to Shreni P
    TI__Mastermind 19795 points

    Hi Shreni,

    Glad to help! For the power consumption, it will likely go up with a higher CAN clock, but we unfortunately do not have this information readily available for CANCLK specifically. Within the device datasheet (located here: https://www.ti.com/lit/SPRS881), there is a table called "Device Current Consumption at 200-MHz SYSCLK" that may provide a good starting point for estimating the impact of communications (since CANA and B are being utilized, along with a few others).

    EDIT: corrected the datasheet link

    Regards,

    Vince