TMS320F2808: Running Application from Flash

Hi Mac, 

The placement of your application into Flash does not depend on the hex2000 utility command, it depends on how you map the application to memory in the linker command file. Are all initialized sections of memory, especially code_start, being mapped to Flash? You can also try aligning all sections of Flash to 128 bit boundaries by using the ALIGN(8) directive in the linker command file - this will make sure the Flash API is being passed 128 bit aligned addresses. 

I also see that you are using the binary flag instead of the ASCII flag in the hex2000 utility command, is this intentional?

Thanks, 

Anu

Hi Anu,
code_start is mapped to address 0x3F7FF6.  I did not create the test application I am using and so I am unfamiliar with the specifics of how it is linked, however I was able to program the flash using a JTAG and then to run the application on CPU restart.  I have created my own test application but did not try uploading using a JTAG.  I followed SPRA958L (Running an Application from Internal Flash Memory on the TMS320F28xxx DSP) as a guide for linking my application. I will try to link with the ALIGN(8) directive and report back.  I am using the binary flag to mimic what the default options in CCS appear to be for the hex utility which I was mimicking.

Yours,

Mac 

I attempted to link using the ALIGN(8) directive with no luck.  I also tried with the ascii option instead of binary.  In order to send ascii data I would need to convert it to binary data in my serial program before sending it over anyway.  Any other advice would be helpful,

Yours,

Mac

Mac, 

It looks like the code_start section is mapped to Flash. How are you checking that the application is correctly being written to Flash? What errors are you checking for from the Flash API?

Thanks, 

Anu

Anu,

My basic format is to loop through the application file twice.  Once to program each block and verify each block and then a second time to verify the application.

Status = Flash_Program(block_address + (0x100 * l), Buffer, 0x100, &FlashStatus);
                if(Status != STATUS_SUCCESS)
                {
                    Example_Error(Status);
                    return;
                }

After I program and verify each block of data, I verify the entire application without the program step (i.e. send the file over serial again to check that all of the data is where it is expected).

I have not yet looked with a JTAG at the specific memory addresses to see if the values I expected were there yet, but I think the Flash API is correctly putting the values that I input into flash.

Yours,

Mac

Maurice, 

That sounds fine, just to double check I would check the contents of memory when you load your application via JTAG vs with the bootloader to make sure there are no discrepancies. 

When you restart the CPU after programming the application, what boot mode is your device in?

Thanks, 

Anu

Anu,

GPI18, GPI29, and GPIO34 are all high, so it is booting to Flash

Mac

Mac, 

Can you share the linker command file you are using?

Thanks, 

Anu

Anu,

I slightly modified the F2808.cmd file found in the F2808 headers and peripherals example code to include the sections mentioned in SPRA958L (mentioned above).  This is the file before I added the ALIGN(8) directives.

/*
// TI File $Revision: /main/4 $
// Checkin $Date: August 2, 2006   16:57:00 $
//###########################################################################
//
// FILE:	F2808.cmd
//
// TITLE:	Linker Command File For F2808 Device
//
//###########################################################################
// $TI Release: DSP280x C/C++ Header Files V1.70 $
// $Release Date: July 27, 2009 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP280x_Headers\cmd
//   
// For BIOS applications add:      DSP280x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP280x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP280x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP280x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP280x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2808  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes: 
         Memory blocks on F2808 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.  
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program 
         and/or data. 
         
         L0/L1 and H0 memory blocks are mirrored - that is
         they can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file. 
         
         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block. 
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   RAMH0       : origin = 0x3FA000, length = 0x002000     /* on-chip RAM block H0 */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHA      PAGE = 0
   .const			   : > FLASHA      PAGE = 0
   .pinit              : > FLASHA      PAGE = 0
   .text               : > FLASHA      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
   .cio                : > RAML1       PAGE = 1
   .sysmem             : > RAML1       PAGE = 1
   .esysmem            : > RAML1       PAGE = 1
   .bss                : > RAML1       PAGE = 1

   ramfuncs            : LOAD = FLASHD, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAML1       PAGE = 1
   .esysmem            : > RAMH0       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

yours,

Mac

Here is the file with the ALIGN(8) directives

/*
// TI File $Revision: /main/4 $
// Checkin $Date: August 2, 2006   16:57:00 $
//###########################################################################
//
// FILE:	F2808.cmd
//
// TITLE:	Linker Command File For F2808 Device
//
//###########################################################################
// $TI Release: DSP280x C/C++ Header Files V1.70 $
// $Release Date: July 27, 2009 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP280x_Headers\cmd
//   
// For BIOS applications add:      DSP280x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP280x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP280x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP280x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP280x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2808  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes: 
         Memory blocks on F2808 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.  
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program 
         and/or data. 
         
         L0/L1 and H0 memory blocks are mirrored - that is
         they can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file. 
         
         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block. 
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   RAMH0       : origin = 0x3FA000, length = 0x002000     /* on-chip RAM block H0 */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHA      PAGE = 0 ALIGN(8)
   .const			   : > FLASHA      PAGE = 0 ALIGN(8)
   .pinit              : > FLASHA      PAGE = 0 ALIGN(8)
   .text               : > FLASHA      PAGE = 0 ALIGN(8)
   codestart           : > BEGIN       PAGE = 0
   .cio                : > RAML1       PAGE = 1 ALIGN(8)
   .sysmem             : > RAML1       PAGE = 1 ALIGN(8)
   .esysmem            : > RAML1       PAGE = 1 ALIGN(8)
   .bss                : > RAML1       PAGE = 1 ALIGN(8)

   ramfuncs            : LOAD = FLASHD, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0,
                         ALIGN(8)

   csmpasswds          : > CSM_PWL     PAGE = 0 ALIGN(8)
   csm_rsvd            : > CSM_RSVD    PAGE = 0 ALIGN(8)
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1 ALIGN(8)
   .ebss               : > RAML1       PAGE = 1 ALIGN(8)
   .esysmem            : > RAMH0       PAGE = 1 ALIGN(8)

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0 ALIGN(8)
   .switch             : > FLASHA      PAGE = 0 ALIGN(8)

   /* Allocate IQ math areas: */
   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Mac, 

I'll review this and get back to you tomorrow.

Thanks, 

Anu

Anu,
Checking in.

Mac 

Mac, 

It looks like the initialized sections are in Flash as expected. Were you able to check the contents of Flash after loading the application through JTAG vs through the bootloader?

You can also go ahead and take out the align directives, they will not be needed. 

Thanks, 

Anu

Anu,

I haven't been able to get my hands on a JTAG.  I will try checking with a JTAG when I find one (I know we have a few but they are tied up), but I do think the values I expect are getting programmed as I run two verification steps and both of the are passing (one directly after I program a block and one after I finish programming the file).    Is there anything else I can be testing in the meantime?  Just to double check, running a boot table from flash should work, right?

Yours,

Mac

Mac, 

I think checking the contents of Flash will be the most helpful. 

I reviewed the thread and noticed that you said that your serial program only sends binary data. Is there a specific reason you are sending binary data instead of ascii data? Could you try modifying the serial program to send ascii data to the bootloader instead?

Thanks, 

Anu