TMS320F28335, GPIO internal pull up/pull down resistor values

Thank you Dave.

Hello Dave,

I have a further question regarding the GPIO internal pull up resistors/active circuits.

Based on ...TMS320F2808.., Digital Signal Processors Data Manual SPRS230N: Regarding the Boot Mode pins (GPIO18, GPIO29, GPIO34), presumably it is the case that without any external components, these signals are configured as active pull-ups (being on the upper set of GPIO12-GPIO34) upon reset, and therefore would produce the Boot to Flash/ROM selection.

In the Hardware Design Guidelines for TMS320F28xx and TMS320F28xxx DSCs, SPRAAS1C, section 3.4.1 discusses the GPIOs, unused inputs being tied off, etc. and mentions that some have internal pull-up/pull-down, but doesn't complete the picture by indicating:

a) whether the internal pull-ups applicable to GPIOs are deemed to be sufficient to tie-off the inputs in all circumstances, or only in certain circumstances, 

b) the relative merits of external pull ups on pins such as the Boot Mode pins, where internal pull ups are already available (and no other circuit loads are connected to those signals).

c) It is noted that for nTRST, an external resistor is required in addition to the Internal pull-down device, as documented in SPRZ171R

Is there further reading you can recommend on this topic?

Thanks,

Andy Jones

This is a relatively old thread to tag onto and was already marked answered.  For future reference, it may be more appropriate to start a new thread, perhaps reference this one, but nevertheless have a new thread.  However, I will comment on some of your questions.

Andrew Jones94 said:

a) whether the internal pull-ups applicable to GPIOs are deemed to be sufficient to tie-off the inputs in all circumstances, or only in certain circumstances, 

The pull ups and pull downs have 140uA of current at nominal conditions.  I would say that if the specific pin on the device did not have any trace routed from it, then the internal pull would be sufficient, provided you ensure it is enabled for inputs.  But if you put any trace on the pin, even to a test point, you run the risk of picking up noise and therefore I would advise using an external pull resistor.  Section 3.4.1 of the Hardware Design Guide (SPRAAS1) discusses the recommended values for the external resistors.

Andrew Jones94 said:

b) the relative merits of external pull ups on pins such as the Boot Mode pins, where internal pull ups are already available (and no other circuit loads are connected to those signals).

I would certainly advocate for external pull resistors for the boot mode pins.  Ensuring the device boots up in the mode you expect, reliably, under all conditions is definitely something to strive for and therefore external resistors help address that situation.

Andrew Jones94 said:

c) It is noted that for nTRST, an external resistor is required in addition to the Internal pull-down device, as documented in SPRZ171R

Is there further reading you can recommend on this topic?

Given that the internal JTAG logic can be activated due to any noise on the JTAG signals, in particular TCK and nTRST, having external pull resistors on these traces will help ensure the internal emulation logic isn't inadvertently activated.  Section 3.3.2 of the Hardware Design Guide (SPRAAS1) discusses the potential ill effects due to not handling the JTAG interface carefully.

Brandon,

Thanks for your informative response.  The Boot Mode Pins are likely to have traces to allow alternative booting, so a) and b) are consistent in our case.

Best Regards

Andy Jones