TMS320F280025: Interrupt during Flash API

Quy,

Flash API does not disable interrupts.  Where is your ISR mapped to execute from?  It should be mapped to execute from RAM (can be mapped to load to flash, but should be mapped to execute from RAM) if you want it to be serviced when an active flash API operation is in progress.  It is mentioned in the guide.  

Thanks and regards,
Vamsi

Hi Vamsi,

The timer interrupt function and its subfunctions are all in RAM with for example

#pragma CODE_SECTION(Timer_Timer0Interrupt, ".TI.ramfunc")

#pragma CODE_SECTION(FBL_task, ".TI.ramfunc")

#pragma CODE_SECTION(Ports_TogglePin, ".TI.ramfunc")

Regards,

Quy

Quy,

I can see in your snapshot that the interrupt is serviced but not that often as it was earlier and later.

What else is CPU doing?  Maybe it is attending some other high priority interrupts at that time?  

Thanks and regards,
Vamsi

Hi Vamsi,

I erase 6 flash sektors there with a for loop.

You can see in my screenshot that there are 6 long pauses of my timer interrupt. Each pause takes about 15ms, coressponding to flash erase time in Table 7-5. Flash Parameters, SPRSP45B. The test pin (green) is set before and reset after erasing.

The function Fapi_issueAsyncCommandWithAddress takes so longtime and I cannot understand why.

Besides Timer Interrupt we also have LIN Interrupt (no high piority) whole time (not only during flash erasing)

Regards,

Quy

Quy,

Can you show me how your linker command file mapped the .TI.ramfunc section?

Thanks and regards,

Vamsi

Hi Vamsi,

It's complex to upload an cmd file so I copied the cmd as well as the map file in code blocks:

For your information, I also use optimization level 4, code/size 2.

MEMORY
{
   BEGIN           	: origin = 0x080000, length = 0x000002
   BOOT_RSVD		: origin = 0x00000002, length = 0x00000126
   RAMM0           	: origin = 0x00000128, length = 0x000002D8
   RAMM1            : origin = 0x00000400, length = 0x000003F8     /* on-chip RAM block M1 */
// RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   
/* RAMLS4           : origin = 0x0000A000, length = 0x00000800
   RAMLS5           : origin = 0x0000A800, length = 0x00000800
   RAMLS6           : origin = 0x0000B000, length = 0x00000800
   RAMLS7           : origin = 0x0000B800, length = 0x00000800 */

   /* Combining all the LS RAMs */
   RAMLS4567        : origin = 0x0000A000, length = 0x00002000
   RAMGS0           : origin = 0x0000C000, length = 0x000007F8
// RAMGS0_RSVD      : origin = 0x0000C7F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RESET            : origin = 0x003FFFC0, length = 0x00000002


   BOOTROM          : origin = 0x003F0000, length = 0x00008000
   BOOTROM_EXT      : origin = 0x003F8000, length = 0x00007FC0

   /* Flash sectors */
   /* BANK 0 */
// FLASHBANK0       : origin = 0x00080000, length = 0x0000FFF0
   FLASH_BANK0_SEC0  : origin = 0x080002, length = 0x000FFE	/* on-chip Flash */
   FLASH_BANK0_SEC1  : origin = 0x081000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC2  : origin = 0x082000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC3  : origin = 0x083000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC4  : origin = 0x084000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC5  : origin = 0x085000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC6  : origin = 0x086000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC7  : origin = 0x087000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC8  : origin = 0x088000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC9  : origin = 0x089000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000	/* on-chip Flash */
   FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x000FF0	/* on-chip Flash */
// FLASH_BANK0_SEC15_RSVD     : origin = 0x08FFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */


}


SECTIONS
{
   codestart        : > BEGIN, ALIGN(8)
   .text            : >> FLASH_BANK0_SEC0| FLASH_BANK0_SEC1,   ALIGN(8)
   .cinit           : > FLASH_BANK0_SEC1,  ALIGN(8)
   .switch          : > FLASH_BANK0_SEC1,  ALIGN(8)
   .reset           : > RESET,                  TYPE = DSECT /* not used, */

   .stack           : > RAMM1

   .init_array      : > FLASH_BANK0_SEC1,  ALIGN(8)
   .bss             : > RAMLS4567
   .bss:output      : > RAMLS4567
   .bss:cio         : > RAMGS0
   .const           : > FLASH_BANK0_SEC1,  ALIGN(8)
   .data            : > RAMLS4567
   .sysmem          : > RAMLS4567

    ramgs0 : > RAMGS0
    ramgs1 : > RAMLS4567

    /*  Allocate IQ math areas: */
   //IQmath           : > RAMLS4567
   //IQmathTables     : > RAMLS4567

  .TI.ramfunc      : LOAD = FLASH_BANK0_SEC1,
                  RUN = RAMGS0,
                  LOAD_START(RamfuncsLoadStart),
                  LOAD_SIZE(RamfuncsLoadSize),
                  LOAD_END(RamfuncsLoadEnd),
                  RUN_START(RamfuncsRunStart),
                  RUN_SIZE(RamfuncsRunSize),
                  RUN_END(RamfuncsRunEnd),
                  ALIGN(8)

}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

Regards,

Quy

Quy,

As I expected, you are executing the flash API from flash instead of RAM.  

Maybe you are using the ROM flash API?  Please confirm.

Thanks and regards,
Vamsi

Hi Vamsi,

I have 2 API files in C2000Ware_3_04_00_00:

FlashAPI_F28002x_FPU32.lib

FlashAPI_ROM_F28002x_FPU32.lib

I copied FlashAPI_F28002x_FPU32.lib into my project. Probaly it's RAM Flash API. Please also check map file, e.g. line 283

I used Flash function with ramfunc:

#pragma CODE_SECTION(Fls_Erase, ".TI.ramfunc")

Regards,

Quy

Quy,

Ok, you are not using the ROM flash API.  Pragma that you showed is only for the Fls_Erase, it is not for flash API.

You can do something like below to map API to flash for load and RAM for execution.  

GROUP
{
.TI.ramfunc
{ -l  FlashAPI_F28002x_FPU32.lib}

} LOAD = FLASH_SECX,
RUN = RAMLSX,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)

Thanks and regards,
Vamsi

Hi Vamsi,

Thank you so much for the information.

I've just read the F28002x_Flash_API_Reference_Guide again and have one more question:

The difference of FlashAPI_ROM_F28002x_FPU32.lib and FlashAPI_F28002x_FPU32.lib is the ***ROM***.lib reside in Boot ROM and the other one reside in Flash, isn't it?

Do I have to do your instruction to load ***ROM***.lib to RAM as well?

Or we don't need to load with the BootRom version to RAM because BootRom can call interrupt functions in Flash?

Regards,

Quy